[RISCV] Add generated RV64GC register description

Add an RCC-owned build-time target description generator and the initial RV64GC register model. Keep ABI aliases separate from canonical MIR register spelling.

1 files changed, 34 insertions, 0 deletions

diff --git a/backend/lib/Target/Description/TargetDescriptionGenerator.h b/backend/lib/Target/Description/TargetDescriptionGenerator.h
new file mode 100644
index 0000000..54cbf3c
--- /dev/null
+++ b/backend/lib/Target/Description/TargetDescriptionGenerator.h
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#ifndef RCC_TARGET_DESCRIPTION_TARGETDESCRIPTIONGENERATOR_H
+#define RCC_TARGET_DESCRIPTION_TARGETDESCRIPTIONGENERATOR_H
+
+#include "rcc/Support/TextDiagnostic.h"
+
+#include <optional>
+#include <string>
+#include <string_view>
+#include <vector>
+
+namespace rcc::targetgen {
+
+struct GeneratedDescription final {
+  std::string RegisterHeader;
+  std::string TargetTables;
+};
+
+struct DescriptionGenerationResult final {
+  std::optional<GeneratedDescription> Output;
+  std::vector<TextDiagnostic> Diagnostics;
+
+  [[nodiscard]] bool succeeded() const noexcept {
+    return Output.has_value() && Diagnostics.empty();
+  }
+};
+
+[[nodiscard]] DescriptionGenerationResult generateDescription(std::string SourceName,
+                                                              std::string SourceText);
+
+} // namespace rcc::targetgen
+
+#endif // RCC_TARGET_DESCRIPTION_TARGETDESCRIPTIONGENERATOR_H