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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-19 03:21:51 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-19 03:21:51 +0800
commit0e514100a702c8c7dbbfc5bbdc789fea3189f915 (patch)
tree88ee8942d3ed17e732bcd3428984c48531d9361e /backend/lib/Target/RISCV/GISel
parent69e1baa931dfa63838683378fa20ed9c46c68a70 (diff)
downloadrcc-project-0e514100a702c8c7dbbfc5bbdc789fea3189f915.tar.gz
rcc-project-0e514100a702c8c7dbbfc5bbdc789fea3189f915.tar.xz
[RISCV][GlobalISel] Correct floating constant materialization
Diffstat (limited to 'backend/lib/Target/RISCV/GISel')
-rw-r--r--backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp19
1 files changed, 16 insertions, 3 deletions
diff --git a/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp b/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
index db7ef45..2cceb92 100644
--- a/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+++ b/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
@@ -1532,7 +1532,22 @@ private:
const std::uint32_t BitWidth = Type->scalarBitWidth();
const std::uint64_t Bits = Floating->Bits.words().empty() ? 0 : Floating->Bits.words().front();
- auto Integer = APInt::fromUnsigned(64, Bits);
+ const InstructionOpcode Move =
+ BitWidth == 32 ? InstructionOpcode::FMV_W_X : InstructionOpcode::FMV_D_X;
+ if (Bits == 0) {
+ auto Zero = physicalRegister(PhysicalRegisterID::X0);
+ if (!Zero)
+ return std::unexpected(Zero.error());
+ auto EraseImmediate = Instruction.eraseOperand(1);
+ if (!EraseImmediate)
+ return std::unexpected(EraseImmediate.error());
+ auto Source = insertPhysicalRegister(Instruction, 1, *Zero, RegisterOperandFlag::Use);
+ if (!Source)
+ return std::unexpected(Source.error());
+ return Instruction.setOpcode(instructionOpcode(Move));
+ }
+
+ auto Integer = APInt::fromUnsigned(BitWidth, Bits);
if (!Integer)
return std::unexpected(Integer.error());
auto IntegerType = LowLevelType::makeCategoryNeutralScalar(64);
@@ -1574,8 +1589,6 @@ private:
constrainBuilderRegisters(Function, Target, {DestinationRegister, *Temporary});
if (!RegisterConstraints)
return std::unexpected(RegisterConstraints.error());
- const InstructionOpcode Move =
- BitWidth == 32 ? InstructionOpcode::FMV_W_X : InstructionOpcode::FMV_D_X;
auto MoveInstruction = Builder.buildInstr(instructionOpcode(Move));
if (!MoveInstruction)
return std::unexpected(MoveInstruction.error());