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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-11 17:38:11 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-11 17:38:11 +0800 |
| commit | 4fe5ee649927d54d6fb74904d7b97ad0f63fd587 (patch) | |
| tree | 75f85f5e6cae3a871fe42d025dca04eeb7c31cfd /backend/lib/Target/RISCV/RISCVBranchInfo.cpp | |
| parent | 6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0 (diff) | |
| download | rcc-project-4fe5ee649927d54d6fb74904d7b97ad0f63fd587.tar.gz rcc-project-4fe5ee649927d54d6fb74904d7b97ad0f63fd587.tar.xz | |
[RISCV] Legalize fixed-baseline RV64 MachineIR
Diffstat (limited to 'backend/lib/Target/RISCV/RISCVBranchInfo.cpp')
| -rw-r--r-- | backend/lib/Target/RISCV/RISCVBranchInfo.cpp | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/backend/lib/Target/RISCV/RISCVBranchInfo.cpp b/backend/lib/Target/RISCV/RISCVBranchInfo.cpp index 18812d8..a00ed67 100644 --- a/backend/lib/Target/RISCV/RISCVBranchInfo.cpp +++ b/backend/lib/Target/RISCV/RISCVBranchInfo.cpp @@ -75,15 +75,19 @@ constexpr std::uint32_t PCRelativeLowFlag = 4; } [[nodiscard]] bool isUnconditionalBranch(const MachineInstr &Instruction) noexcept { - if (Instruction.opcode() == targetOpcode(InstructionOpcode::C_J)) + if (Instruction.opcode() == targetOpcode(InstructionOpcode::C_J) || + Instruction.opcode() == targetOpcode(InstructionOpcode::PseudoBR)) { return true; + } return Instruction.opcode() == targetOpcode(InstructionOpcode::JAL) && isZeroRegister(Instruction.operandAt(0)); } [[nodiscard]] std::size_t branchTargetIndex(Opcode Value) noexcept { - if (Value == targetOpcode(InstructionOpcode::C_J)) + if (Value == targetOpcode(InstructionOpcode::C_J) || + Value == targetOpcode(InstructionOpcode::PseudoBR)) { return 0; + } if (Value == targetOpcode(InstructionOpcode::C_BEQZ) || Value == targetOpcode(InstructionOpcode::C_BNEZ)) { return 1; @@ -96,7 +100,8 @@ constexpr std::uint32_t PCRelativeLowFlag = 4; [[nodiscard]] Expected<MachineBasicBlock *> directTarget(MachineInstr &Instruction) { if (!isConditionalBranch(Instruction.opcode()) && Instruction.opcode() != targetOpcode(InstructionOpcode::JAL) && - Instruction.opcode() != targetOpcode(InstructionOpcode::C_J)) { + Instruction.opcode() != targetOpcode(InstructionOpcode::C_J) && + Instruction.opcode() != targetOpcode(InstructionOpcode::PseudoBR)) { return static_cast<MachineBasicBlock *>(nullptr); } MachineOperand *Operand = Instruction.operandAt(branchTargetIndex(Instruction.opcode())); @@ -697,8 +702,10 @@ public: return Offset >= -2048 && Offset <= 2046; if (isConditionalBranch(Value)) return Offset >= -4096 && Offset <= 4094; - if (Value == targetOpcode(InstructionOpcode::JAL)) + if (Value == targetOpcode(InstructionOpcode::JAL) || + Value == targetOpcode(InstructionOpcode::PseudoBR)) { return Offset >= -1048576 && Offset <= 1048574; + } return true; } |
