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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-27 17:13:36 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-27 17:13:36 +0800 |
| commit | 3b14bd4d5324b5a280c1ee5567b5526b59e60c5b (patch) | |
| tree | 1881fc10785a8c195c9b1cdb2ddde6c310f63ab7 /backend/lib/Target/RISCV/RISCVGISelFloating.rccdesc | |
| parent | dd477bc887546b00144ea6c0a3e03ad366661636 (diff) | |
| download | rcc-project-3b14bd4d5324b5a280c1ee5567b5526b59e60c5b.tar.gz rcc-project-3b14bd4d5324b5a280c1ee5567b5526b59e60c5b.tar.xz | |
[GlobalISel] Generate floating memory selection
Diffstat (limited to 'backend/lib/Target/RISCV/RISCVGISelFloating.rccdesc')
| -rw-r--r-- | backend/lib/Target/RISCV/RISCVGISelFloating.rccdesc | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/backend/lib/Target/RISCV/RISCVGISelFloating.rccdesc b/backend/lib/Target/RISCV/RISCVGISelFloating.rccdesc index a5d9107..940da64 100644 --- a/backend/lib/Target/RISCV/RISCVGISelFloating.rccdesc +++ b/backend/lib/Target/RISCV/RISCVGISelFloating.rccdesc @@ -795,3 +795,59 @@ selection_rules: - { complex: select_condition_code, operand: 1 } - { operand: 2 } - { operand: 3 } + - + id: select_g_fpextload_s32_to_s64 + priority: 300 + match: + opcode: G_FPEXTLOAD + result_type: { kind: scalar, bits: 64 } + memory: { index: 0, bytes: 4 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: FPR } + - { index: 1, bank: GPR } + apply: + temporaries: + - { id: loaded, type: { kind: scalar, bits: 32 } } + instructions: + - opcode: FLW + root: true + operands: + - { temporary: loaded, flags: [define] } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - opcode: FCVT_D_S + root: false + operands: + - { operand: 0 } + - { temporary: loaded, flags: [use] } + - { immediate: 0 } + - + id: select_g_fptruncstore_s64_to_s32 + priority: 300 + match: + opcode: G_FPTRUNCSTORE + memory: { index: 0, bytes: 4 } + operand_types: + - { index: 0, kind: scalar, bits: 64 } + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: FPR } + - { index: 1, bank: GPR } + apply: + temporaries: + - { id: rounded, type: { kind: scalar, bits: 32 } } + instructions: + - opcode: FCVT_S_D + root: false + operands: + - { temporary: rounded, flags: [define] } + - { operand: 0 } + - { immediate: 7 } + - opcode: FSW + root: true + operands: + - { temporary: rounded, flags: [use] } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } |