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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 13:21:44 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 13:21:44 +0800 |
| commit | 9f7cd14951ed9b7e04176f68f5c454aa7018b3e3 (patch) | |
| tree | dba38b5a5f75203d10972ff81754ef76c9bb8857 /backend/lib/Target/RISCV/RISCVRegisterAllocation.cpp | |
| parent | 8558f80b4077536d6aa46b97328d6df1210e261f (diff) | |
| download | rcc-project-9f7cd14951ed9b7e04176f68f5c454aa7018b3e3.tar.gz rcc-project-9f7cd14951ed9b7e04176f68f5c454aa7018b3e3.tar.xz | |
[RISCV] Use the generated opcode conversion
Diffstat (limited to 'backend/lib/Target/RISCV/RISCVRegisterAllocation.cpp')
| -rw-r--r-- | backend/lib/Target/RISCV/RISCVRegisterAllocation.cpp | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/backend/lib/Target/RISCV/RISCVRegisterAllocation.cpp b/backend/lib/Target/RISCV/RISCVRegisterAllocation.cpp index de5900d..e24c199 100644 --- a/backend/lib/Target/RISCV/RISCVRegisterAllocation.cpp +++ b/backend/lib/Target/RISCV/RISCVRegisterAllocation.cpp @@ -28,10 +28,6 @@ struct SpillForm final { std::uint64_t SizeInBytes; }; -[[nodiscard]] constexpr Opcode targetOpcode(InstructionOpcode Value) noexcept { - return Opcode::fromValue(static_cast<std::uint32_t>(Value)); -} - [[nodiscard]] constexpr RegisterClassID registerClassID(RegisterClass Value) noexcept { return RegisterClassID::fromValue(static_cast<std::uint32_t>(Value)); } @@ -177,7 +173,7 @@ public: } for (const InstructionOpcode OpcodeValue : {Form->Load, Form->Store}) { const InstructionDescriptor *Instruction = - Target.instructionDescriptor(targetOpcode(OpcodeValue)); + Target.instructionDescriptor(instructionOpcode(OpcodeValue)); const InstructionFlag MemoryFlag = OpcodeValue == Form->Load ? InstructionFlag::MayLoad : InstructionFlag::MayStore; if (Instruction == nullptr || Instruction->Operands.size() != 3 || @@ -212,7 +208,7 @@ public: Description->SpillAlignmentInBits / 8U); if (!Memory) return std::unexpected(Memory.error()); - auto Pending = Builder.buildInstr(targetOpcode(Form.Load)); + auto Pending = Builder.buildInstr(instructionOpcode(Form.Load)); if (!Pending) return std::unexpected(Pending.error()); if (auto Result = Pending->addDef(Destination); !Result) @@ -247,7 +243,7 @@ public: Description->SpillAlignmentInBits / 8U); if (!Memory) return std::unexpected(Memory.error()); - auto Pending = Builder.buildInstr(targetOpcode(Form.Store)); + auto Pending = Builder.buildInstr(instructionOpcode(Form.Store)); if (!Pending) return std::unexpected(Pending.error()); if (auto Result = Pending->addUse(Source); !Result) @@ -269,10 +265,10 @@ public: if (DefinedReg == nullptr || *DefinedReg != VirtualReg || !Definition->isDef()) return false; - if (Instruction.opcode() == targetOpcode(InstructionOpcode::LUI)) + if (Instruction.opcode() == instructionOpcode(InstructionOpcode::LUI)) return Instruction.operandCount() == 2 && Instruction.operandAt(1) != nullptr; - if (Instruction.opcode() != targetOpcode(InstructionOpcode::ADDI) && - Instruction.opcode() != targetOpcode(InstructionOpcode::ADDIW)) { + if (Instruction.opcode() != instructionOpcode(InstructionOpcode::ADDI) && + Instruction.opcode() != instructionOpcode(InstructionOpcode::ADDIW)) { return false; } if (Instruction.operandCount() != 3) |