[CodeGen] Remove redundant numeric call-site IDs

4 files changed, 5 insertions, 20 deletions

diff --git a/backend/lib/Target/RISCV/RISCV.rccdesc b/backend/lib/Target/RISCV/RISCV.rccdesc
index ea3a775..ad79073 100644
--- a/backend/lib/Target/RISCV/RISCV.rccdesc
+++ b/backend/lib/Target/RISCV/RISCV.rccdesc
@@ -3375,7 +3375,6 @@ instructions:
     name: PseudoCALL
     operands:
       - { kinds: [global_symbol, external_symbol, register], role: use, allowed_target_flags: 1 }
-      - { kinds: [immediate, integer_immediate] }
       - { kinds: [register_mask] }
     num_explicit_defs: 0
     implicit_defs: [{ register: X1 }]
@@ -3389,7 +3388,6 @@ instructions:
     name: PseudoTAIL
     operands:
       - { kinds: [global_symbol, external_symbol, register], role: use, allowed_target_flags: 1 }
-      - { kinds: [immediate, integer_immediate] }
       - { kinds: [register_mask] }
     num_explicit_defs: 0
     allow_extra_implicit_operands: true
@@ -3416,7 +3414,6 @@ instructions:
       - { kinds: [register], role: def, register_class: GPR, register_bank: GPR, name: RD }
       - { kinds: [register], role: use, register_class: GPR, register_bank: GPR, name: RS1 }
       - { kinds: [immediate, mc_symbol], immediate_predicate: SIMM12, allowed_target_flags: 4, name: IMM }
-      - { kinds: [immediate, integer_immediate] }
       - { kinds: [register_mask] }
     num_explicit_defs: 1
     allow_extra_implicit_operands: true
@@ -3434,7 +3431,6 @@ instructions:
       - { kinds: [register], role: def, register_class: GPR, register_bank: GPR, name: RD }
       - { kinds: [register], role: use, register_class: GPR, register_bank: GPR, name: RS1 }
       - { kinds: [immediate, mc_symbol], immediate_predicate: SIMM12, allowed_target_flags: 4, name: IMM }
-      - { kinds: [immediate, integer_immediate] }
       - { kinds: [register_mask] }
     num_explicit_defs: 1
     allow_extra_implicit_operands: true
diff --git a/backend/lib/Target/RISCV/RISCVCallLowering.cpp b/backend/lib/Target/RISCV/RISCVCallLowering.cpp
index 3a5805a..308ba05 100644
--- a/backend/lib/Target/RISCV/RISCVCallLowering.cpp
+++ b/backend/lib/Target/RISCV/RISCVCallLowering.cpp
@@ -574,10 +574,8 @@ Expected<CallLoweringPlan> RISCVCallLowering::planCall(const CallLoweringRequest
     return makeUnexpected(ErrorCode::InvalidArgument,
                           "call request has an invalid fixed/variadic argument boundary");
   }
-  if (Request.CallSiteID == 0 || !Request.Callee.isValid()) {
-    return makeUnexpected(ErrorCode::InvalidArgument,
-                          "call request requires a valid callee and nonzero call-site ID");
-  }
+  if (!Request.Callee.isValid())
+    return makeUnexpected(ErrorCode::InvalidArgument, "call request requires a valid callee");
   if (hasStructReturn(Request.Arguments) &&
       (Request.Arguments.empty() ||
        !Request.Arguments.front().Flags.has(ABIValueFlag::StructReturn))) {
@@ -704,7 +702,6 @@ Expected<CallLoweringPlan> RISCVCallLowering::planCall(const CallLoweringRequest
   Plan.ByValCopies = std::move(ByValCopies);
   Plan.PreservedMask = createCallPreservedMask();
   Plan.Callee = std::move(EffectiveCallee);
-  Plan.CallSiteID = Request.CallSiteID;
   Plan.TailDecision = Decision;
   Plan.TailRejectionReason = std::move(RejectionReason);
   return CallLoweringPlan::create(std::move(Plan));
@@ -1337,9 +1334,6 @@ emitOutgoingArguments(MachineIRBuilder &Builder, const CallLoweringPlan &Plan,
   auto Callee = addCallTarget(*Instruction, *Plan.callee());
   if (!Callee)
     return std::unexpected(Callee.error());
-  auto CallSite = addUnsignedImmediate(*Instruction, Plan.callSiteID());
-  if (!CallSite)
-    return std::unexpected(CallSite.error());
   auto Mask = Instruction->addRegisterMask(Plan.preservedMask());
   if (!Mask)
     return std::unexpected(Mask.error());
diff --git a/backend/lib/Target/RISCV/RISCVCodeGen.cpp b/backend/lib/Target/RISCV/RISCVCodeGen.cpp
index c9d14af..bd4e20c 100644
--- a/backend/lib/Target/RISCV/RISCVCodeGen.cpp
+++ b/backend/lib/Target/RISCV/RISCVCodeGen.cpp
@@ -1511,7 +1511,6 @@ void eraseDeadArtifacts(std::span<MachineInstr *const> Candidates,
   Request.Arguments = {Value(*Left, 0), Value(*Right, 1)};
   Request.Results = {Value(*Destination, 0)};
   Request.FixedArgumentCount = Request.Arguments.size();
-  Request.CallSiteID = Instruction.stableID().value();
 
   MachineIRBuilder Builder(Function, Target);
   auto Point = Builder.setInsertPointBefore(Instruction);
diff --git a/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp b/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp
index 8a309e0..ae5e51d 100644
--- a/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp
+++ b/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp
@@ -338,9 +338,8 @@ copyRegisters(const MachineInstr &Instruction) {
                                         const TargetDescription &Target, bool IsTail) {
   MachineBasicBlock *Block = Instruction.parent();
   const MachineOperand *Callee = Instruction.operandAt(0);
-  const MachineOperand *CallSite = Instruction.operandAt(1);
-  const MachineOperand *Mask = Instruction.operandAt(2);
-  if (Block == nullptr || Callee == nullptr || CallSite == nullptr || Mask == nullptr ||
+  const MachineOperand *Mask = Instruction.operandAt(1);
+  if (Block == nullptr || Callee == nullptr || Mask == nullptr ||
       Mask->kind() != MachineOperand::Kind::RegisterMask) {
     return makeUnexpected(ErrorCode::VerificationError,
                           "RISC-V call pseudo has malformed explicit operands");
@@ -409,14 +408,11 @@ copyRegisters(const MachineInstr &Instruction) {
       Anchor ? LowPending->addMCSymbol(*Anchor, 0, PCRelativeLowFlag) : LowPending->addImmediate(0);
   if (!LowOffset)
     return std::unexpected(LowOffset.error());
-  auto LowCallSite = LowPending->addOperand(CallSite->cloneDetached());
-  if (!LowCallSite)
-    return std::unexpected(LowCallSite.error());
   auto LowMask = LowPending->addOperand(Mask->cloneDetached());
   if (!LowMask)
     return std::unexpected(LowMask.error());
   auto Implicit = copyExtraImplicitOperands(
-      Instruction, 3, *LowPending, IsTail ? std::nullopt : std::optional<PhysicalRegister>{*Link},
+      Instruction, 2, *LowPending, IsTail ? std::nullopt : std::optional<PhysicalRegister>{*Link},
       std::nullopt);
   if (!Implicit)
     return std::unexpected(Implicit.error());