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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-04 05:34:15 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-04 05:34:15 +0800 |
| commit | 183e2354e9fdd107be420cbb185c1d239434aa48 (patch) | |
| tree | ce5c42cb6e9790072d5dcf00d1d55cb7f6573ddc /backend/unittests/CodeGen/MachineFunctionClonerTest.cpp | |
| parent | 67d6231fba98e776c0f442e5b6908e279c35e346 (diff) | |
| download | rcc-project-183e2354e9fdd107be420cbb185c1d239434aa48.tar.gz rcc-project-183e2354e9fdd107be420cbb185c1d239434aa48.tar.xz | |
[MIR] Add machine instruction parser and printer
Parse MachineFunction bodies in two passes and serialize the same MachineIR model in complete or readable form. Extend instruction attachments and memory operands required by the fixed LLVM MIR grammar, and cover deterministic parse-print round trips.
Diffstat (limited to 'backend/unittests/CodeGen/MachineFunctionClonerTest.cpp')
| -rw-r--r-- | backend/unittests/CodeGen/MachineFunctionClonerTest.cpp | 34 |
1 files changed, 28 insertions, 6 deletions
diff --git a/backend/unittests/CodeGen/MachineFunctionClonerTest.cpp b/backend/unittests/CodeGen/MachineFunctionClonerTest.cpp index a019c8b..9c8a447 100644 --- a/backend/unittests/CodeGen/MachineFunctionClonerTest.cpp +++ b/backend/unittests/CodeGen/MachineFunctionClonerTest.cpp @@ -266,8 +266,14 @@ createFunction(TestContext &Context, std::string Name, std::uint64_t ID) { Description.Accesses = {rcc::MemoryAccessFlag::Load, rcc::MemoryAccessFlag::Dereferenceable}; Description.Size = *rcc::MemorySize::fixed(8); Description.Align = *rcc::Alignment::create(8); + Description.BaseAlign = *rcc::Alignment::create(16); Description.Base = std::move(Base); Description.Offset = -8; + Description.TBAA = rcc::MachineMetadataReference::embeddedIR(10); + Description.AliasScope = rcc::MachineMetadataReference::embeddedIR(11); + Description.NoAlias = rcc::MachineMetadataReference::embeddedIR(12); + Description.NoAliasAddressSpace = rcc::MachineMetadataReference::embeddedIR(13); + Description.RangeMetadata = rcc::MachineMetadataReference::embeddedIR(14); Description.TargetFlags = 0x3; return Description; } @@ -469,6 +475,16 @@ struct SourceFixture final { const rcc::StackObject *Object = Function.frameInfo().object(Fixture.StackSlot); if (Definition == nullptr || LoadInstruction == nullptr || Object == nullptr) return false; + Context.expect( + Definition->setPreInstrSymbol("before").has_value() && + Definition->setPostInstrSymbol("after").has_value() && + Definition->setHeapAllocMarker(rcc::MachineMetadataReference::embeddedIR(20)) + .has_value() && + Definition->setPCSections(rcc::MachineMetadataReference::embeddedIR(21)).has_value() && + Definition->setMMRA(rcc::MachineMetadataReference::embeddedIR(22)).has_value() && + Definition->setCFIType(23).has_value() && + Definition->setDeactivationSymbol("guard").has_value(), + "source instruction attachments must be recorded"); rcc::StackObjectDesc UpdatedStackSlot = *Object->description(); UpdatedStackSlot.Lifetime.push_back({Definition->stableID(), LoadInstruction->stableID()}); Context.expect(Function.frameInfo() @@ -621,12 +637,18 @@ void testDeepClone(TestContext &Context) { return; } - Context.expect(DestinationDef->operandAt(0)->registerValue() == NewValue && - DestinationDef->flags().has(rcc::MachineInstrFlag::NoMerge) && - DestinationDef->sourceLocation() == - rcc::SourceLocation{"source.mir", 9, 4, 2} && - DestinationDef->origin() == rcc::OriginID::fromValue(77), - "clone must remap register operands and preserve instruction metadata"); + Context.expect( + DestinationDef->operandAt(0)->registerValue() == NewValue && + DestinationDef->flags().has(rcc::MachineInstrFlag::NoMerge) && + DestinationDef->sourceLocation() == rcc::SourceLocation{"source.mir", 9, 4, 2} && + DestinationDef->origin() == rcc::OriginID::fromValue(77) && + DestinationDef->preInstrSymbol() == "before" && + DestinationDef->postInstrSymbol() == "after" && + DestinationDef->heapAllocMarker() == rcc::MachineMetadataReference::embeddedIR(20) && + DestinationDef->pcSections() == rcc::MachineMetadataReference::embeddedIR(21) && + DestinationDef->mmra() == rcc::MachineMetadataReference::embeddedIR(22) && + DestinationDef->cfiType() == 23 && DestinationDef->deactivationSymbol() == "guard", + "clone must remap register operands and preserve instruction metadata"); Context.expect(DestinationBranch->operandAt(0)->getIf<rcc::BasicBlockOperand>()->Block == DestinationExit, "clone must remap basic-block operands"); |
