[MIR] Remove alternate layout and float APIs

3 files changed, 66 insertions, 36 deletions

diff --git a/backend/unittests/MIR/LLVMConstantSyntaxTest.cpp b/backend/unittests/MIR/LLVMConstantSyntaxTest.cpp
index 96346a0..c10fc68 100644
--- a/backend/unittests/MIR/LLVMConstantSyntaxTest.cpp
+++ b/backend/unittests/MIR/LLVMConstantSyntaxTest.cpp
@@ -31,8 +31,7 @@ private:
 };
 
 constexpr rcc::mir::LLVMConstantSyntaxOptions Options{
-    .DefaultPointerSizeInBits = 64,
-    .DataLayout = {},
+    .DataLayout = "e-p:64:64",
     .NamedTypes = {},
 };
 
@@ -44,6 +43,14 @@ void expectRoundTrip(TestContext &Context, std::string_view Text, std::uint64_t
     return;
   }
   auto Size = rcc::mir::llvmConstantStorageSize(Parsed->Type, Options);
+  if (!Size || *Size != ExpectedSize) {
+    std::cerr << Text << ": expected storage size " << ExpectedSize << ", got ";
+    if (Size)
+      std::cerr << *Size;
+    else
+      std::cerr << Size.error().message();
+    std::cerr << '\n';
+  }
   Context.expect(Size.has_value() && *Size == ExpectedSize,
                  "LLVM constant storage size must match its structured type");
   auto Printed = rcc::mir::printLLVMConstant(*Parsed);
@@ -92,12 +99,12 @@ void expectLayoutRoundTrip(TestContext &Context, std::string_view Text,
 
 void testScalarConstants(TestContext &Context) {
   expectRoundTrip(Context, "i1 true", 1);
-  expectRoundTrip(Context, "i65 -1", 9);
+  expectRoundTrip(Context, "i65 -1", 12);
   expectRoundTrip(Context, "half 0xH3C00", 2);
   expectRoundTrip(Context, "bfloat 0xR3F80", 2);
   expectRoundTrip(Context, "float 1.250000e+00", 4);
   expectRoundTrip(Context, "double 0x3FF0000000000000", 8);
-  expectRoundTrip(Context, "x86_fp80 f0x4000C000000000000000", 10);
+  expectRoundTrip(Context, "x86_fp80 f0x4000C000000000000000", 16);
   expectRoundTrip(Context, "fp128 f0x3FFF0000000000000000000000000000", 16);
   expectRoundTrip(Context, "ptr null", 8);
   expectRoundTrip(Context, "i32 undef", 4);
@@ -186,7 +193,7 @@ void testExplicitHexIntegerConstants(TestContext &Context) {
   expectIntegerWords(Context, "i16 s0xFF", SignedFF);
   expectIntegerWords(Context, "i8 s0x1FF", SignedFF8);
 
-  expectRoundTrip(Context, "i65 s0x01", 9);
+  expectRoundTrip(Context, "i65 s0x01", 12);
   Context.expect(!rcc::mir::parseLLVMConstant("i32 u0x", Options) &&
                      !rcc::mir::parseLLVMConstant("i32 u0X1", Options),
                  "explicit LLVM hexadecimal integers must use the fixed spelling");
@@ -363,7 +370,6 @@ void testDataLayoutAndNamedTypes(TestContext &Context) {
           .Name = "loop", .Definition = "{ %loop }", .NumericName = false},
   };
   static constexpr rcc::mir::LLVMConstantSyntaxOptions LayoutOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-p:64:64-p1:32:16:64-i64:64:128-i128:128-v96:128:256-a:0:64",
       .NamedTypes = Definitions,
   };
@@ -385,7 +391,6 @@ void testDataLayoutAndNamedTypes(TestContext &Context) {
 
 void testAddressSpacePointerWidths(TestContext &Context) {
   constexpr rcc::mir::LLVMConstantSyntaxOptions HeterogeneousLayoutOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-p:64:64-p1:32:16:64",
       .NamedTypes = {},
   };
@@ -395,39 +400,29 @@ void testAddressSpacePointerWidths(TestContext &Context) {
                      AddressSpaceOnePointer.has_value() && *AddressSpaceOnePointer == 32,
                  "LLVM data layout must provide pointer width by address space");
 
-  constexpr rcc::mir::LLVMConstantSyntaxOptions LegacyOptions{
-      .DefaultPointerSizeInBits = 64,
-      .DataLayout = {},
-      .NamedTypes = {},
-  };
-  auto LegacyPointer = rcc::mir::llvmPointerSizeInBits(7, LegacyOptions);
-  Context.expect(LegacyPointer.has_value() && *LegacyPointer == 64,
-                 "legacy pointer-width fallback must apply without an explicit data layout");
+  auto MissingPointer = rcc::mir::llvmPointerSizeInBits(7);
+  Context.expect(!MissingPointer,
+                 "pointer width lookup must reject a missing explicit data layout");
 }
 
 void testDataLayoutBoundaryRules(TestContext &Context) {
   static constexpr rcc::mir::LLVMConstantSyntaxOptions IntegerAlignmentOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-p:64:64-i24:128:128",
       .NamedTypes = {},
   };
   static constexpr rcc::mir::LLVMConstantSyntaxOptions HistoricalAggregateOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-p:64:64-a0:64:128",
       .NamedTypes = {},
   };
   static constexpr rcc::mir::LLVMConstantSyntaxOptions ZeroAggregateOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-p:64:64-a:0:64",
       .NamedTypes = {},
   };
   static constexpr rcc::mir::LLVMConstantSyntaxOptions NonBytePointerOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-p:33:8:8:32",
       .NamedTypes = {},
   };
   static constexpr rcc::mir::LLVMConstantSyntaxOptions PointerFlagsOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-pue1(storage):33:8:8:32-po2(allones):64:64",
       .NamedTypes = {},
   };
@@ -440,7 +435,6 @@ void testDataLayoutBoundaryRules(TestContext &Context) {
   expectLayoutRoundTrip(Context, "ptr addrspace(1) null", PointerFlagsOptions, 5, 1);
 
   static constexpr rcc::mir::LLVMConstantSyntaxOptions InvalidIndexSizeOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-p:33:8:8:34",
       .NamedTypes = {},
   };
@@ -450,7 +444,6 @@ void testDataLayoutBoundaryRules(TestContext &Context) {
                  "LLVM pointer index size larger than its representation must be rejected");
 
   static constexpr rcc::mir::LLVMConstantSyntaxOptions NonLayoutOptions{
-      .DefaultPointerSizeInBits = 0,
       .DataLayout = "e-m:e-n8:16:32-S128-Fi64-P1-G2-A3-ni:1:2-ve-s-p:64:64",
       .NamedTypes = {},
   };
@@ -458,7 +451,6 @@ void testDataLayoutBoundaryRules(TestContext &Context) {
 
   const auto ExpectInvalidDataLayout = [&Context](std::string_view DataLayout) {
     const rcc::mir::LLVMConstantSyntaxOptions InvalidOptions{
-        .DefaultPointerSizeInBits = 0,
         .DataLayout = DataLayout,
         .NamedTypes = {},
     };
diff --git a/backend/unittests/MIR/MIParserTest.cpp b/backend/unittests/MIR/MIParserTest.cpp
index e57cdfb..815a18e 100644
--- a/backend/unittests/MIR/MIParserTest.cpp
+++ b/backend/unittests/MIR/MIParserTest.cpp
@@ -221,7 +221,9 @@ bb.1."exit block" (landing-pad, bbsections Cold):
   rcc::mir::MIParserContext ParserContext;
   ParserContext.Metadata.push_back(
       {.TextID = 0, .Reference = rcc::MachineMetadataReference::embeddedIR(0)});
-  ParserContext.DefaultPointerSizeInBits = 64;
+  ParserContext.PointerSizeInBits = [](std::uint32_t) -> rcc::Expected<std::uint32_t> {
+    return 64;
+  };
   rcc::mir::MIParser Parser(*Function, *Target, "body.mir", Body, ParserContext);
   const auto Parsed = Parser.parse();
   const bool ParseSucceeded =
@@ -507,7 +509,9 @@ void testLLVMInlineAsmAndConstantMemorySyntax(TestContext &Context) {
   %1:gpr64 = TEST_LOAD $g0 :: (load (s64) from unknown-address + 4)
 )";
   rcc::mir::MIParserContext ParserContext;
-  ParserContext.DefaultPointerSizeInBits = 64;
+  ParserContext.PointerSizeInBits = [](std::uint32_t) -> rcc::Expected<std::uint32_t> {
+    return 64;
+  };
   rcc::mir::MIParser Parser(*Function, *Target, "llvm-compatible.mir", Body, ParserContext);
   auto Parsed = Parser.parse();
   Context.expect(Parsed.has_value(), "LLVM inline-asm and constant-pointer MMO syntax must parse");
@@ -553,7 +557,9 @@ void testLLVMCompareExchangeMemorySyntax(TestContext &Context) {
   %3:_(s8) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic (s8))
 )";
   rcc::mir::MIParserContext ParserContext;
-  ParserContext.DefaultPointerSizeInBits = 64;
+  ParserContext.PointerSizeInBits = [](std::uint32_t) -> rcc::Expected<std::uint32_t> {
+    return 64;
+  };
   rcc::mir::MIParser Parser(*Function, *Target, "llvm-cmpxchg.mir", Body, ParserContext);
   const auto Parsed = Parser.parse();
   Context.expect(Parsed.has_value(), "LLVM one-ordering compare-exchange MMO syntax must parse");
diff --git a/backend/unittests/MIR/MIRDocumentTest.cpp b/backend/unittests/MIR/MIRDocumentTest.cpp
index c655e64..52e5d65 100644
--- a/backend/unittests/MIR/MIRDocumentTest.cpp
+++ b/backend/unittests/MIR/MIRDocumentTest.cpp
@@ -489,10 +489,8 @@ void testDocumentTransaction(TestContext &Context) {
 
   auto Readable = rcc::mir::printMIRDocument(
       *Document, *Target,
-      rcc::mir::MIRDocumentPrinterOptions{.Mode = rcc::mir::MIPrintMode::Readable,
-                                          .EmitEmbeddedIR = true,
-                                          .DataLayout = {},
-                                          .DefaultPointerSizeInBits = 0});
+      rcc::mir::MIRDocumentPrinterOptions{
+          .Mode = rcc::mir::MIPrintMode::Readable, .EmitEmbeddedIR = true, .DataLayout = {}});
   Context.expect(Readable.has_value(), "readable MIR document printing must succeed");
   if (!Readable)
     return;
@@ -504,10 +502,8 @@ void testDocumentTransaction(TestContext &Context) {
 
   auto WithoutEmbeddedIR = rcc::mir::printMIRDocument(
       *Document, *Target,
-      rcc::mir::MIRDocumentPrinterOptions{.Mode = rcc::mir::MIPrintMode::Complete,
-                                          .EmitEmbeddedIR = false,
-                                          .DataLayout = {},
-                                          .DefaultPointerSizeInBits = 0});
+      rcc::mir::MIRDocumentPrinterOptions{
+          .Mode = rcc::mir::MIPrintMode::Complete, .EmitEmbeddedIR = false, .DataLayout = {}});
   Context.expect(!WithoutEmbeddedIR && WithoutEmbeddedIR.error().message().find(
                                            "requires embedded LLVM IR") != std::string_view::npos,
                  "printer must reject output that omits required embedded LLVM IR");
@@ -574,6 +570,42 @@ void testHeterogeneousPointerLayout(TestContext &Context) {
                      ConstantDescription != nullptr && ConstantDescription->Size == 4,
                  "embedded data layout must determine p1 register and generic-constant widths");
 
+  rcc::mir::MIRDocumentParserOptions OverrideOptions;
+  OverrideOptions.DataLayout = "e-p:64:64-p1:64:64";
+  OverrideOptions.MachineInstructions.VerifyAfterParse = false;
+  OverrideOptions.VerifyMachineFunctions = false;
+  auto Overridden = rcc::mir::parseMIRDocument(
+      *Target, "overridden-layout.mir", std::string(HeterogeneousPointerDocument), OverrideOptions);
+  const rcc::MachineFunction *OverriddenFunction =
+      Overridden.succeeded() ? Overridden.document()->unit().function("pointer_layout") : nullptr;
+  const rcc::MachineConstantPoolEntry *OverriddenConstant =
+      OverriddenFunction == nullptr
+          ? nullptr
+          : OverriddenFunction->constantPool().entry(rcc::ConstantPoolIndex::fromValue(0));
+  const rcc::MachineConstantPoolEntryDesc *OverriddenConstantDescription =
+      OverriddenConstant == nullptr ? nullptr : OverriddenConstant->description();
+  const auto OverriddenPointerType = rcc::LLT::makePointer(1, 64);
+  Context.expect(Overridden.succeeded() && OverriddenFunction != nullptr &&
+                     OverriddenPointerType.has_value() &&
+                     OverriddenFunction->registerInfo().virtualRegisters().size() == 1 &&
+                     OverriddenFunction->registerInfo().virtualRegisters().front().Type ==
+                         *OverriddenPointerType &&
+                     OverriddenConstantDescription != nullptr &&
+                     OverriddenConstantDescription->Size == 8,
+                 "explicit target DataLayout must override embedded LLVM IR layout");
+  if (!Overridden.succeeded())
+    printDiagnostics(Overridden);
+
+  if (Overridden.succeeded()) {
+    rcc::mir::MIRDocumentPrinterOptions OverridePrinterOptions;
+    OverridePrinterOptions.EmitEmbeddedIR = false;
+    OverridePrinterOptions.DataLayout = OverrideOptions.DataLayout;
+    auto OverriddenOutput =
+        rcc::mir::printMIRDocument(*Overridden.document(), *Target, OverridePrinterOptions);
+    Context.expect(OverriddenOutput.has_value(),
+                   "matching target DataLayout must allow omitting overridden embedded IR");
+  }
+
   rcc::mir::MIRDocumentPrinterOptions PrinterOptions;
   PrinterOptions.EmitEmbeddedIR = false;
   auto WithoutLayout = rcc::mir::printMIRDocument(*Parsed.document(), *Target, PrinterOptions);
@@ -609,8 +641,8 @@ void testHeterogeneousPointerLayout(TestContext &Context) {
 
   PrinterOptions.DataLayout = "e-p:64:64-p1:64:64";
   auto Mismatched = rcc::mir::printMIRDocument(*Parsed.document(), *Target, PrinterOptions);
-  Context.expect(!Mismatched &&
-                     Mismatched.error().message().find("exactly match") != std::string_view::npos,
+  Context.expect(!Mismatched && Mismatched.error().message().find(
+                                    "pointer virtual-register width") != std::string_view::npos,
                  "mismatched output DataLayout must be rejected when embedded IR is omitted");
 }