[CodeGen] Unify scalar low-level types

2 files changed, 6 insertions, 36 deletions

diff --git a/backend/unittests/MIR/MIParserTest.cpp b/backend/unittests/MIR/MIParserTest.cpp
index c35dc74..4ed39ae 100644
--- a/backend/unittests/MIR/MIParserTest.cpp
+++ b/backend/unittests/MIR/MIParserTest.cpp
@@ -265,8 +265,8 @@ bb.1."exit block" (landing-pad, bbsections Cold):
   Context.expect(Registers.size() == 5 &&
                      Registers[0].RegClass == rcc::test::TestRegisterClass::GPR64 &&
                      Registers[1].RegClass == rcc::test::TestRegisterClass::GPR64 &&
-                     Registers[2].Type == *rcc::LLT::makeAnyScalar(128) &&
-                     Registers[3].Type == *rcc::LLT::makeFloat(rcc::FloatSemantics::IEEEDouble) &&
+                     Registers[2].Type == *rcc::LowLevelType::makeCategoryNeutralScalar(128) &&
+                     Registers[3].Type == *rcc::LowLevelType::makeCategoryNeutralScalar(64) &&
                      Registers[4].RegClass == rcc::test::TestRegisterClass::GPR64,
                  "textual virtual registers must map deterministically to classed MachineIR vregs");
 
@@ -385,7 +385,7 @@ void testAddressSpacePointerWidthResolver(TestContext &Context) {
                             "bb.0:\n  %0:_(p1) = TEST_COPY $g0\n", ParserContext, ParserOptions);
   auto Parsed = Parser.parse();
   const auto Registers = Function->registerInfo().virtualRegisters();
-  auto ExpectedType = rcc::LLT::makePointer(1, 32);
+  auto ExpectedType = rcc::LowLevelType::makePointer(1, 32);
   Context.expect(Parsed.has_value() && ExpectedType.has_value() && Registers.size() == 1 &&
                      Registers.front().Type == *ExpectedType,
                  "MI parser must use the address-space-specific pointer-width resolver");
@@ -396,35 +396,6 @@ void testAddressSpacePointerWidthResolver(TestContext &Context) {
   }
 }
 
-void testUnserializableLowLevelType(TestContext &Context) {
-  auto Target = createTarget();
-  auto Function = createFunction(Context, 4);
-  Context.expect(Target.has_value(), "unserializable-type target must be valid");
-  if (!Target || !Function)
-    return;
-
-  rcc::mir::MIParserOptions ParserOptions;
-  ParserOptions.VerifyAfterParse = false;
-  rcc::mir::MIParser Parser(*Function, *Target, "unserializable-type.mir",
-                            "bb.0:\n  %0:gpr64(f64) = TEST_COPY $g0\n", {}, ParserOptions);
-  auto Parsed = Parser.parse();
-  auto Register = rcc::Register::makeVirtual(0);
-  auto UnsupportedType = rcc::LLT::makeFloat(rcc::FloatSemantics::Float8E5M2);
-  Context.expect(Parsed.has_value() && Register.has_value() && UnsupportedType.has_value(),
-                 "unserializable-type test setup must parse a typed virtual register");
-  if (!Parsed || !Register || !UnsupportedType)
-    return;
-  auto SetType = Function->registerInfo().setType(*Register, *UnsupportedType);
-  Context.expect(SetType.has_value(), "test setup must assign an extended floating low-level type");
-  if (!SetType)
-    return;
-
-  auto Printed = rcc::mir::printMachineFunctionBody(*Function, *Target);
-  Context.expect(!Printed && Printed.error().message().find("cannot spell this floating") !=
-                                 std::string_view::npos,
-                 "printer must reject extended low-level types absent from fixed LLVM MIR grammar");
-}
-
 void expectParseError(TestContext &Context, const rcc::TargetDescription &Target, std::string Body,
                       std::string_view Message);
 
@@ -525,7 +496,7 @@ void testLLVMInlineAsmAndConstantMemorySyntax(TestContext &Context) {
   const auto *ExtraInfo = InlineAsm->operandAt(1)->getIf<std::int64_t>();
   const rcc::MachineInstr *Load = InlineAsm->next();
   const rcc::MachineMemOperandDesc &Memory = Load->memOperands().front()->description();
-  const auto MemoryType = rcc::LLT::makeAnyScalar(64);
+  const auto MemoryType = rcc::LowLevelType::makeCategoryNeutralScalar(64);
   Context.expect(ExtraInfo != nullptr && *ExtraInfo == 13,
                  "inline-asm extra-info names must aggregate into the LLVM bit field");
   Context.expect(Memory.Base.kind() == rcc::MemoryBase::Kind::IRConstant &&
@@ -629,7 +600,6 @@ int main() {
   TestContext Context;
   testTwoPassBodyParsing(Context);
   testAddressSpacePointerWidthResolver(Context);
-  testUnserializableLowLevelType(Context);
   testCompatibleRegisterClassAndBankAnnotations(Context);
   testTypedIntegerTruncation(Context);
   testLLVMInlineAsmAndConstantMemorySyntax(Context);
diff --git a/backend/unittests/MIR/MIRDocumentTest.cpp b/backend/unittests/MIR/MIRDocumentTest.cpp
index 7f1dfc3..6d84580 100644
--- a/backend/unittests/MIR/MIRDocumentTest.cpp
+++ b/backend/unittests/MIR/MIRDocumentTest.cpp
@@ -558,7 +558,7 @@ void testHeterogeneousPointerLayout(TestContext &Context) {
   }
 
   const rcc::MachineFunction *Function = Parsed.document()->unit().function("pointer_layout");
-  auto PointerType = rcc::LLT::makePointer(1, 32);
+  auto PointerType = rcc::LowLevelType::makePointer(1, 32);
   const rcc::MachineConstantPoolEntry *Constant =
       Function == nullptr ? nullptr
                           : Function->constantPool().entry(rcc::ConstantPoolIndex::fromValue(0));
@@ -584,7 +584,7 @@ void testHeterogeneousPointerLayout(TestContext &Context) {
           : OverriddenFunction->constantPool().entry(rcc::ConstantPoolIndex::fromValue(0));
   const rcc::MachineConstantPoolEntryDesc *OverriddenConstantDescription =
       OverriddenConstant == nullptr ? nullptr : OverriddenConstant->description();
-  const auto OverriddenPointerType = rcc::LLT::makePointer(1, 64);
+  const auto OverriddenPointerType = rcc::LowLevelType::makePointer(1, 64);
   Context.expect(Overridden.succeeded() && OverriddenFunction != nullptr &&
                      OverriddenPointerType.has_value() &&
                      OverriddenFunction->registerInfo().virtualRegisters().size() == 1 &&