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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-13 23:55:38 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-13 23:55:38 +0800
commitaa69e15c6909c3b162b15f5326f0a72ba9bb7163 (patch)
tree6428eb20e41bad1fc8ad2f5c259bc5537f54554d /backend/unittests/Target/RISCVSSAExitTest.cpp
parentcd30fb546e389d1fb78ce8e579b3dba3a8fdb52a (diff)
downloadrcc-project-aa69e15c6909c3b162b15f5326f0a72ba9bb7163.tar.gz
rcc-project-aa69e15c6909c3b162b15f5326f0a72ba9bb7163.tar.xz
[CodeGen] Unify scalar low-level types
Diffstat (limited to 'backend/unittests/Target/RISCVSSAExitTest.cpp')
-rw-r--r--backend/unittests/Target/RISCVSSAExitTest.cpp11
1 files changed, 6 insertions, 5 deletions
diff --git a/backend/unittests/Target/RISCVSSAExitTest.cpp b/backend/unittests/Target/RISCVSSAExitTest.cpp
index 54a5911..1912666 100644
--- a/backend/unittests/Target/RISCVSSAExitTest.cpp
+++ b/backend/unittests/Target/RISCVSSAExitTest.cpp
@@ -54,7 +54,8 @@ private:
return rcc::RegisterClassID::fromValue(static_cast<std::uint32_t>(Class));
}
-[[nodiscard]] rcc::Expected<rcc::Register> createVReg(rcc::MachineFunction &Function, rcc::LLT Type,
+[[nodiscard]] rcc::Expected<rcc::Register> createVReg(rcc::MachineFunction &Function,
+ rcc::LowLevelType Type,
rcc::riscv::RegisterBank Bank,
rcc::riscv::RegisterClass Class) {
auto Reg = Function.registerInfo().createVirtualRegister(Type);
@@ -219,9 +220,9 @@ void testBehaviorAndCopyLegality(TestContext &Context, const rcc::TargetDescript
Context.expect(Rewritten && *Rewritten && blockOperand(*Jump, 1)->Block == *Third,
"RV64GC branch target rewriting must update direct JAL operands");
- auto I64 = rcc::LLT::makeInteger(64);
- auto F64 = rcc::LLT::makeFloat(rcc::FloatSemantics::IEEEDouble);
- auto F32 = rcc::LLT::makeFloat(rcc::FloatSemantics::IEEESingle);
+ auto I64 = rcc::LowLevelType::makeCategoryNeutralScalar(64);
+ auto F64 = rcc::LowLevelType::makeCategoryNeutralScalar(64);
+ auto F32 = rcc::LowLevelType::makeCategoryNeutralScalar(32);
if (!I64 || !F64 || !F32)
return;
auto GPR =
@@ -318,7 +319,7 @@ void testRV64GCCriticalEdge(TestContext &Context, const rcc::TargetDescription &
auto Merge = appendBlock(**Function);
if (!From || !Side || !Other || !Merge)
return;
- auto I64 = rcc::LLT::makeInteger(64);
+ auto I64 = rcc::LowLevelType::makeCategoryNeutralScalar(64);
auto X0 = rcc::riscv::physicalRegister(rcc::riscv::PhysicalRegisterID::X0);
if (!I64 || !X0)
return;