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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 19:38:37 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 19:38:37 +0800 |
| commit | 98cae0e8835a1eb8fcb0e43870c04ed934cc51ac (patch) | |
| tree | 3c5b198778900ed13e2bb429b32ae91bff540548 /backend/utils/TableGen | |
| parent | 9d1485c0dd4d071e590c18fb8aa02095de3cc830 (diff) | |
| download | rcc-project-98cae0e8835a1eb8fcb0e43870c04ed934cc51ac.tar.gz rcc-project-98cae0e8835a1eb8fcb0e43870c04ed934cc51ac.tar.xz | |
[CodeGen] Match LLVM branch relaxation semantics
Diffstat (limited to 'backend/utils/TableGen')
| -rw-r--r-- | backend/utils/TableGen/Common/CodeGenInstruction.cpp | 5 | ||||
| -rw-r--r-- | backend/utils/TableGen/Common/CodeGenTarget.h | 1 | ||||
| -rw-r--r-- | backend/utils/TableGen/InstrInfoEmitter.cpp | 5 |
3 files changed, 9 insertions, 2 deletions
diff --git a/backend/utils/TableGen/Common/CodeGenInstruction.cpp b/backend/utils/TableGen/Common/CodeGenInstruction.cpp index fc6b400..d06fbfc 100644 --- a/backend/utils/TableGen/Common/CodeGenInstruction.cpp +++ b/backend/utils/TableGen/Common/CodeGenInstruction.cpp @@ -428,6 +428,7 @@ CodeGenTarget::normalizeImplicitRegisters(const std::vector<SourceImplicitRegist .Flags = {}, .SchedulingClass = HasSchedulingClass ? SchedulingClass->second : 0, .EncodingCategory = HasEncodingCategory ? EncodingCategory->second : 0, + .SizeInBytes = Instruction.SizeInBytes, .AssemblyFormat = HasAssemblyFormat ? AssemblyFormat->second : 0, .RequiresMemoryOperands = Instruction.RequiresMemoryOperands, .Owner = std::string(*Owner), @@ -547,6 +548,10 @@ CodeGenTarget::normalizeImplicitRegisters(const std::vector<SourceImplicitRegist fail(Instruction.Range, "instruction pseudo flags, owner, and deadline are inconsistent"); return false; } + if (Normalized.SizeInBytes != 0 && !HasFlag("ProducesCode")) { + fail(Instruction.Range, "only code-producing instructions can declare a byte size"); + return false; + } if (Normalized.RequiresMemoryOperands && !HasFlag("MayLoad") && !HasFlag("MayStore")) { fail(Instruction.Range, "memory operand requirements need a load or store instruction flag"); return false; diff --git a/backend/utils/TableGen/Common/CodeGenTarget.h b/backend/utils/TableGen/Common/CodeGenTarget.h index cc2697c..139cfc8 100644 --- a/backend/utils/TableGen/Common/CodeGenTarget.h +++ b/backend/utils/TableGen/Common/CodeGenTarget.h @@ -155,6 +155,7 @@ struct NormalizedInstruction final { std::vector<std::string> Flags; std::uint32_t SchedulingClass = 0; std::uint32_t EncodingCategory = 0; + std::uint32_t SizeInBytes = 0; std::uint32_t AssemblyFormat = 0; bool RequiresMemoryOperands = false; std::string Owner; diff --git a/backend/utils/TableGen/InstrInfoEmitter.cpp b/backend/utils/TableGen/InstrInfoEmitter.cpp index 795a718..b06134f 100644 --- a/backend/utils/TableGen/InstrInfoEmitter.cpp +++ b/backend/utils/TableGen/InstrInfoEmitter.cpp @@ -179,8 +179,9 @@ std::string emitInstructionInfo(const NormalizedTargetModel &Model) { Output << "InstructionFlag::" << Flag << ", "; Output << "}, .SchedulingClass = SchedulingClassID::fromValue(" << Instruction.SchedulingClass << "), .EncodingCategory = EncodingCategoryID::fromValue(" - << Instruction.EncodingCategory << "), .AssemblyFormat = AssemblyFormatID::fromValue(" - << Instruction.AssemblyFormat << "), .RequiresMemoryOperands = " + << Instruction.EncodingCategory << "), .SizeInBytes = " << Instruction.SizeInBytes + << ", .AssemblyFormat = AssemblyFormatID::fromValue(" << Instruction.AssemblyFormat + << "), .RequiresMemoryOperands = " << (Instruction.RequiresMemoryOperands ? "true" : "false") << ", .Owner = PseudoOwner::" << Instruction.Owner << ", .Deadline = PipelineStage::" << Instruction.Deadline |
