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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-15 23:33:09 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-15 23:33:09 +0800 |
| commit | 1fe32a79cee5cae6dea6fbb1d9f15f7db817a356 (patch) | |
| tree | 860ec6e0f92fbaf5fb26188daf2d885c84a028b6 /backend | |
| parent | 03859a465585d5e9dd256c7a0a2855219dc79ed3 (diff) | |
| download | rcc-project-1fe32a79cee5cae6dea6fbb1d9f15f7db817a356.tar.gz rcc-project-1fe32a79cee5cae6dea6fbb1d9f15f7db817a356.tar.xz | |
[GlobalISel] Clear virtual register types after selection
Diffstat (limited to 'backend')
| -rw-r--r-- | backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 3 | ||||
| -rw-r--r-- | backend/lib/CodeGen/MachineVerifier.cpp | 5 |
2 files changed, 6 insertions, 2 deletions
diff --git a/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp index 15dfdf0..642e26f 100644 --- a/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp +++ b/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp @@ -326,6 +326,9 @@ Expected<MachinePassResult> InstructionSelect::runImplementation(MachineFunction if (!RegisterValidation) return std::unexpected(withErrorContext(RegisterValidation.error(), "instruction selection produced invalid registers: ")); + Function.registerInfo().clearAllVirtualRegisterTypes(); + Result.Changed = true; + Result.Changes.add(MachinePassChange::Registers); Result.Preserved = Result.Changed ? PreservedAnalyses::none() : PreservedAnalyses::all(); return Result; } diff --git a/backend/lib/CodeGen/MachineVerifier.cpp b/backend/lib/CodeGen/MachineVerifier.cpp index 68a28db..5a040b9 100644 --- a/backend/lib/CodeGen/MachineVerifier.cpp +++ b/backend/lib/CodeGen/MachineVerifier.cpp @@ -923,8 +923,9 @@ private: } const bool NeedsTypes = Options.Mode == MachineVerifierMode::PreLegalizer || - Has(MachineFunctionProperty::Legalized) || - Has(MachineFunctionProperty::RegBankSelected); + (!Has(MachineFunctionProperty::Selected) && + (Has(MachineFunctionProperty::Legalized) || + Has(MachineFunctionProperty::RegBankSelected))); if (NeedsTypes && MissingVirtualType) return fail("typed pipeline stage has a virtual register without LowLevelType"); |
