diff options
| author | Richard Qin <richard.qin.x@gmail.com> | 2026-11-08 08:08:35 +0800 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-11-08 08:08:35 +0800 |
| commit | 0fe36f1071a1f5b2e0bf9a53e76e8724879c0c9f (patch) | |
| tree | c395ea0626033e2218e04df4836e10209fbd9f81 /mubios/drivers | |
| parent | f3541313a873e431f79df94a7bd475e7a3db7b6c (diff) | |
| download | rcc-project-0fe36f1071a1f5b2e0bf9a53e76e8724879c0c9f.tar.gz rcc-project-0fe36f1071a1f5b2e0bf9a53e76e8724879c0c9f.tar.xz | |
[mubios] Fixed wrong mask
Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
Diffstat (limited to 'mubios/drivers')
| -rw-r--r-- | mubios/drivers/ioapic.c | 9 | ||||
| -rw-r--r-- | mubios/drivers/pic.c | 6 |
2 files changed, 12 insertions, 3 deletions
diff --git a/mubios/drivers/ioapic.c b/mubios/drivers/ioapic.c index 98f2210..97c9d15 100644 --- a/mubios/drivers/ioapic.c +++ b/mubios/drivers/ioapic.c @@ -27,8 +27,11 @@ #define IOAPIC_IRQ0_LOW 0x10u #define IOAPIC_IRQ0_HIGH 0x11u +#define IOAPIC_IRQ1_LOW 0x12u +#define IOAPIC_IRQ1_HIGH 0x13u #define IOAPIC_IRQ0_EXTINT 0x00000700u +#define IOAPIC_IRQ1_EXTINT 0x00000700u #define IA32_APIC_BASE_MSR 0x0000001Bu #define APIC_BASE 0xFEE00000u @@ -84,4 +87,10 @@ ioapic_init (void) */ ioapic_write (IOAPIC_IRQ0_LOW, IOAPIC_IRQ0_EXTINT); ioapic_write (IOAPIC_IRQ0_HIGH, 0x00000000u); + + /* + * Route the keyboard IRQ through the legacy PIC ExtINT path. + */ + ioapic_write (IOAPIC_IRQ1_LOW, IOAPIC_IRQ1_EXTINT); + ioapic_write (IOAPIC_IRQ1_HIGH, 0x00000000u); } diff --git a/mubios/drivers/pic.c b/mubios/drivers/pic.c index 2144b6b..1cabb52 100644 --- a/mubios/drivers/pic.c +++ b/mubios/drivers/pic.c @@ -36,7 +36,7 @@ #define PIC1_CASCADE_ID 0x04u #define PIC2_CASCADE_ID 0x02u -#define PIC1_MASK_DEFAULT 0xFAu +#define PIC1_MASK_DEFAULT 0xF8u #define PIC2_MASK_DEFAULT 0xFFu void @@ -55,8 +55,8 @@ pic_init (void) io_out8 (PIC2_DATA, PIC_ICW4_8086); /* - * Keep the cascade line enabled. - * All actual hardware IRQ lines remain masked. + * Keep the timer, keyboard, and cascade lines enabled. + * All other master IRQ lines remain masked. */ io_out8 (PIC1_DATA, PIC1_MASK_DEFAULT); io_out8 (PIC2_DATA, PIC2_MASK_DEFAULT); |