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authorRichard Qin <richard.qin.x@gmail.com>2026-11-10 03:10:57 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-11-10 03:10:57 +0800
commitc3c996300c7c9231363ed1450ef63c9bd7a52f46 (patch)
tree0db3f82a7fc08fd41f2e11a11f00396b13b33d5b /rcc-legacy/tests/sysy_lvX/057_if_complex_expr.sy
parent7ecf4901b486693e525d3daafc7d6e9c3a4abcd0 (diff)
downloadrcc-project-c3c996300c7c9231363ed1450ef63c9bd7a52f46.tar.gz
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[mubios] Fix legacy interrupt routing and enable PIIX IDE channels
Keep IOAPIC inputs masked and deliver legacy PIC interrupts through LVT0 only, avoiding extra ExtINT routes that leave PIC and APIC interrupts in service. Enumerate the root PCI bus for the PIIX3 IDE controller during POST. Enable I/O decoding and both IDE channels while preserving their timing configuration so Linux ata_piix probes the disks. Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
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