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authorRichard Qin <richard.qin.x@gmail.com>2026-11-10 03:34:30 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-11-10 03:34:30 +0800
commit2fac7e284531dccd9919a3207902e08d4def5cf8 (patch)
tree56022ba4bf349bc1a0f46d029d0580d1ffe622b8 /rcc-legacy/tests/sysy_lvX/116_nested_calls2.sy
parentc3c996300c7c9231363ed1450ef63c9bd7a52f46 (diff)
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[mubios] Configure PIIX PCI interrupt routing during POSTHEADmaster
PCI devices retained interrupt line zero, causing e1000 to request the timer IRQ and fail to bring up the network interface. Enumerate the root PCI bus, configure PIIX3 PIRQ A-D to IRQ10/10/11/11, and assign device interrupt lines using the QEMU pc slot and pin mapping. Keep the PIIX PM SCI on IRQ9 and configure level triggering in the ELCR while preserving other IRQ settings. Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
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