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| author | Richard Qin <richard.qin.x@gmail.com> | 2026-03-16 14:40:52 +0800 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-03-16 14:40:52 +0800 |
| commit | 1554746fd79d51c6bd2281820520a4e2d2c16301 (patch) | |
| tree | 0ec2c5146cc8ef49c6e90521168935e5ca376cf6 /rv64cpu/docs | |
| parent | 6628a9c41277334d6ceb02db9c2bc187f5a21c10 (diff) | |
| download | rcc-project-1554746fd79d51c6bd2281820520a4e2d2c16301.tar.gz rcc-project-1554746fd79d51c6bd2281820520a4e2d2c16301.tar.xz | |
fix naming problems
Diffstat (limited to 'rv64cpu/docs')
| -rw-r--r-- | rv64cpu/docs/naming_convention.md | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/rv64cpu/docs/naming_convention.md b/rv64cpu/docs/naming_convention.md index c99d8a4..fea4844 100644 --- a/rv64cpu/docs/naming_convention.md +++ b/rv64cpu/docs/naming_convention.md @@ -149,11 +149,4 @@ this convention. These should be renamed during the next refactoring pass. | File | Current Name | Recommended Name | Reason | |---|---|---|---| -| `alu.sv` | `rs1_val` | `operand_a` | ALU input is muxed, not always rs1 | -| `alu.sv` | `rs2_val` | `operand_b` | ALU input is muxed, not always rs2 | -| `alu.sv` | `alu_res` | `alu_result` | Avoid non-approved abbreviation `res` | -| `regfile.sv` | `rs1_val` | `rs1_rdata` | Use `_rdata` for read data ports | -| `regfile.sv` | `rs2_val` | `rs2_rdata` | Use `_rdata` for read data ports | -| `regfile.sv` | `rd_val` | `rd_wdata` | Use `_wdata` for write data ports | -| `regfile.sv` | `reg_write` | `reg_write_en` | Use `_en` suffix for enable signals | -| `decoder.sv` | `reg_write` | `reg_write_en` | Use `_en` suffix for enable signals | +|None|None|None|None| |