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| author | Richard Qin <richard.qin.x@gmail.com> | 2026-03-15 16:07:39 +0800 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-03-15 16:07:39 +0800 |
| commit | f6441a2e6f901748b504ef93872649c9463a404e (patch) | |
| tree | 54332548c2e2b74b44aba646a09cffb543856050 /rv64cpu/sw/common | |
| download | rcc-project-f6441a2e6f901748b504ef93872649c9463a404e.tar.gz rcc-project-f6441a2e6f901748b504ef93872649c9463a404e.tar.xz | |
initial commit: project architecture
Diffstat (limited to 'rv64cpu/sw/common')
| -rw-r--r-- | rv64cpu/sw/common/.gitkeep | 0 | ||||
| -rw-r--r-- | rv64cpu/sw/common/link.ld | 76 |
2 files changed, 76 insertions, 0 deletions
diff --git a/rv64cpu/sw/common/.gitkeep b/rv64cpu/sw/common/.gitkeep new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/rv64cpu/sw/common/.gitkeep diff --git a/rv64cpu/sw/common/link.ld b/rv64cpu/sw/common/link.ld new file mode 100644 index 0000000..705a25d --- /dev/null +++ b/rv64cpu/sw/common/link.ld @@ -0,0 +1,76 @@ +/* ═══════════════════════════════════════════════════════════════════════════════ + * richard-cpu Linker Script + * + * Memory map matches rtl/soc/mem_map.sv + * ═══════════════════════════════════════════════════════════════════════════════ */ + +OUTPUT_ARCH("riscv") +ENTRY(_start) + +MEMORY +{ + /* Boot ROM / SRAM — 256 MB total addressable, practical limit is FPGA BRAM */ + ROM (rx) : ORIGIN = 0x00000000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x00010000, LENGTH = 256M - 64K +} + +SECTIONS +{ + /* ── Code ──────────────────────────────────────────────────────────────── */ + .text : ALIGN(4) + { + *(.text.init) /* _start / trap vector MUST be first */ + *(.text .text.*) + } > ROM + + /* ── Read-only data ───────────────────────────────────────────────────── */ + .rodata : ALIGN(8) + { + *(.rodata .rodata.*) + *(.srodata .srodata.*) + } > ROM + + /* ── Initialized data (load from ROM, copy to RAM) ────────────────────── */ + .data : ALIGN(8) + { + _data_start = .; + *(.data .data.*) + *(.sdata .sdata.*) + _data_end = .; + } > RAM AT > ROM + + _data_load = LOADADDR(.data); + + /* ── BSS (zero-initialized) ──────────────────────────────────────────── */ + .bss (NOLOAD) : ALIGN(8) + { + _bss_start = .; + *(.bss .bss.*) + *(.sbss .sbss.*) + *(COMMON) + _bss_end = .; + } > RAM + + /* ── Stack (grows downward) ──────────────────────────────────────────── */ + . = ALIGN(16); + _stack_bottom = .; + . = . + 8K; + _stack_top = .; + + /* ── Heap ────────────────────────────────────────────────────────────── */ + _heap_start = .; + + /* ── tohost / fromhost (Compliance test interface) ────────────────────── */ + .tohost (NOLOAD) : ALIGN(8) + { + PROVIDE(tohost = .); . += 8; + PROVIDE(fromhost = .); . += 8; + } > RAM + + /DISCARD/ : + { + *(.comment) + *(.note.*) + *(.eh_frame*) + } +} |
