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| author | Richard Qin <richard.qin.x@gmail.com> | 2026-03-15 23:30:38 +0800 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-03-15 23:30:38 +0800 |
| commit | ba535e24e0aaf2fcefa1196dc4d12ad241f349d3 (patch) | |
| tree | f77f3bfa770523c0654890039ba3dab9e45db48b /rv64cpu/tb/CMakeLists.txt | |
| parent | f6441a2e6f901748b504ef93872649c9463a404e (diff) | |
| download | rcc-project-ba535e24e0aaf2fcefa1196dc4d12ad241f349d3.tar.gz rcc-project-ba535e24e0aaf2fcefa1196dc4d12ad241f349d3.tar.xz | |
Add and test alu unit
Diffstat (limited to 'rv64cpu/tb/CMakeLists.txt')
| -rw-r--r-- | rv64cpu/tb/CMakeLists.txt | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/rv64cpu/tb/CMakeLists.txt b/rv64cpu/tb/CMakeLists.txt index 8679562..73df088 100644 --- a/rv64cpu/tb/CMakeLists.txt +++ b/rv64cpu/tb/CMakeLists.txt @@ -30,14 +30,14 @@ file(GLOB_RECURSE ALL_RTL_SOURCES # # Uncomment and fill in as you implement each module, for example: # -# add_verilator_target( -# NAME tb_alu -# TOP_MODULE alu -# SOURCES ${RTL_CORE_DIR}/include/rv64_pkg.sv -# ${RTL_CORE_DIR}/alu.sv -# INCLUDE_DIRS ${RTL_COMMON_INCLUDES} -# TB_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_alu.cpp -# ) +add_verilator_target( + NAME tb_alu + TOP_MODULE alu + SOURCES ${RTL_CORE_DIR}/include/rv64_pkg.sv + ${RTL_CORE_DIR}/alu.sv + INCLUDE_DIRS ${RTL_COMMON_INCLUDES} + TB_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_alu.cc +) # # add_verilator_target( # NAME tb_decoder |