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authorRichard Qin <richard.qin.x@gmail.com>2026-04-01 00:58:22 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-04-01 00:58:22 +0800
commitcf0476e565c74082f011a6c428095e60a743b822 (patch)
treea5b5feaa2228d4eb1e90213d07e709bd4f12bf97 /rv64cpu/tb/unit/tb_decoder.cc
parentab6a21ae1099bff120111b8a9dcfa50c9fcad5a1 (diff)
downloadrcc-project-cf0476e565c74082f011a6c428095e60a743b822.tar.gz
rcc-project-cf0476e565c74082f011a6c428095e60a743b822.tar.xz
feat: Complete CSR/privileged/exception interrupt path and fill in strict acceptance tests
- Refactor trap/CSR data path in the Core, unified with trap_ctrl interface to drive CSR update and return process - Improve critical paths for exception/interrupt handling: ecall, illegal, load fault, external interrupt, mret/sret return - Adjust pipeline stage registers with flush/stall coordination, fix residual control signal issues in trap scenarios - Enhance decode and related pipeline module behavior consistency, fill in missing control signal propagation across registers - Expand core integration testing, add trap/interrupt scenarios and CLI dispatch that can be executed per case - Extend CSR unit test coverage: read/write semantics, privilege switching, delegation and nested returns, illegal access protection, etc. - Register new core scenario cases in CTest to form a regression-capable P2 strict acceptance suite Verification: - Build passed - Full CTest passed (22/22)
Diffstat (limited to 'rv64cpu/tb/unit/tb_decoder.cc')
-rw-r--r--rv64cpu/tb/unit/tb_decoder.cc9
1 files changed, 7 insertions, 2 deletions
diff --git a/rv64cpu/tb/unit/tb_decoder.cc b/rv64cpu/tb/unit/tb_decoder.cc
index aa6788c..25a3d69 100644
--- a/rv64cpu/tb/unit/tb_decoder.cc
+++ b/rv64cpu/tb/unit/tb_decoder.cc
@@ -39,7 +39,8 @@ static int fail_count = 0;
} \
} while(0)
-void decode(Vdecoder* dut, uint32_t instr, const char* name) {
+void decode(Vdecoder* dut, uint32_t instr, const char* name, uint8_t priv_mode = 3) {
+ dut->priv_mode = priv_mode & 0x3;
dut->instr = instr;
dut->eval();
test_count++;
@@ -233,6 +234,10 @@ int main(int argc, char** argv) {
CHECK(dut, reg_write_en, 1, "CSRRW");
CHECK(dut, illegal_instr,0, "CSRRW");
+ decode(dut, 0x300110F3, "CSRRW x1, mstatus, x2 (U-mode)", 0);
+ CHECK(dut, illegal_instr,1, "CSRRW U-mode illegal");
+ CHECK(dut, is_csr, 0, "CSRRW U-mode is_csr cleared");
+
// 20. ECALL
// all-zero fields + opcode=1110011
decode(dut, 0x00000073, "ECALL");
@@ -256,7 +261,7 @@ int main(int argc, char** argv) {
// 23. SRET
// funct7=0001000 rs2=00010 rs1=00000 funct3=000 rd=00000 op=1110011
- decode(dut, 0x10200073, "SRET");
+ decode(dut, 0x10200073, "SRET", 1);
CHECK(dut, is_sret, 1, "SRET");
CHECK(dut, reg_write_en, 0, "SRET");