feat: Complete CSR/privileged/exception interrupt path and fill in strict acceptance tests

- Refactor trap/CSR data path in the Core, unified with trap_ctrl interface to drive CSR update and return process
- Improve critical paths for exception/interrupt handling: ecall, illegal, load fault, external interrupt, mret/sret return
- Adjust pipeline stage registers with flush/stall coordination, fix residual control signal issues in trap scenarios
- Enhance decode and related pipeline module behavior consistency, fill in missing control signal propagation across registers
- Expand core integration testing, add trap/interrupt scenarios and CLI dispatch that can be executed per case
- Extend CSR unit test coverage: read/write semantics, privilege switching, delegation and nested returns, illegal access protection, etc.
- Register new core scenario cases in CTest to form a regression-capable P2 strict acceptance suite

Verification:

- Build passed
- Full CTest passed (22/22)

1 files changed, 16 insertions, 0 deletions

diff --git a/rv64cpu/tb/unit/tb_trap_ctrl.cc b/rv64cpu/tb/unit/tb_trap_ctrl.cc
index 142d743..1708598 100644
--- a/rv64cpu/tb/unit/tb_trap_ctrl.cc
+++ b/rv64cpu/tb/unit/tb_trap_ctrl.cc
@@ -28,6 +28,8 @@ namespace {
 constexpr uint64_t EXC_INST_ILLEGAL   = 2ULL;
 constexpr uint64_t EXC_ECALL_FROM_S   = 9ULL;
 constexpr uint64_t EXC_LOAD_PAGE_FAULT= 13ULL;
+constexpr uint64_t EXC_LOAD_FAULT     = 5ULL;
+constexpr uint64_t EXC_STORE_FAULT    = 7ULL;
 
 constexpr uint64_t INT_M_SOFTWARE     = 3ULL;
 constexpr uint64_t INT_M_TIMER        = 7ULL;
@@ -125,6 +127,20 @@ int main(int argc, char** argv) {
     check(dut->trap_mcause == EXC_LOAD_PAGE_FAULT, "PageFault_Mcause");
     check(dut->trap_mtval == 0xBADC0FFEE0ULL, "PageFault_Mtval");
 
+    drive_defaults(dut);
+    dut->trap_load_fault = 1;
+    dut->trap_bad_addr = 0xABCDEF0010ULL;
+    dut->eval();
+    check(dut->trap_mcause == EXC_LOAD_FAULT, "LoadFault_Mcause");
+    check(dut->trap_mtval == 0xABCDEF0010ULL, "LoadFault_Mtval");
+
+    drive_defaults(dut);
+    dut->trap_store_fault = 1;
+    dut->trap_bad_addr = 0xABCDEF0020ULL;
+    dut->eval();
+    check(dut->trap_mcause == EXC_STORE_FAULT, "StoreFault_Mcause");
+    check(dut->trap_mtval == 0xABCDEF0020ULL, "StoreFault_Mtval");
+
     // ---------------------------------------------------------------------
     // 2) Interrupt priority + delegation to supervisor
     // ---------------------------------------------------------------------