aboutsummaryrefslogtreecommitdiff
path: root/rv64cpu
diff options
context:
space:
mode:
authorRichard Qin <richard.qin.x@gmail.com>2026-03-18 03:41:01 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-03-18 03:41:01 +0800
commit5e18d160d16771252292ccebcb66ae4ba8cc9d64 (patch)
treede775ba3ad261802174bdb02914f11296a87187a /rv64cpu
parent48489af495086d794f1b57bbb62ea1d8aca86ac5 (diff)
downloadrcc-project-5e18d160d16771252292ccebcb66ae4ba8cc9d64.tar.gz
rcc-project-5e18d160d16771252292ccebcb66ae4ba8cc9d64.tar.xz
fixed vm_trace bug
Diffstat (limited to 'rv64cpu')
-rw-r--r--rv64cpu/tb/core/tb_core.cc12
1 files changed, 6 insertions, 6 deletions
diff --git a/rv64cpu/tb/core/tb_core.cc b/rv64cpu/tb/core/tb_core.cc
index 14a4c1e..1c5926c 100644
--- a/rv64cpu/tb/core/tb_core.cc
+++ b/rv64cpu/tb/core/tb_core.cc
@@ -28,7 +28,7 @@
#include <verilated.h>
#include "Vrichard_core.h"
-#ifdef VM_TRACE
+#if VM_TRACE
#include <verilated_vcd_c.h>
#endif
@@ -149,13 +149,13 @@ public:
Vrichard_core* top;
MemoryModel mem;
uint64_t sim_time;
-#ifdef VM_TRACE
+#if VM_TRACE
VerilatedVcdC* tfp;
#endif
CoreSim() : sim_time(0) {
top = new Vrichard_core;
-#ifdef VM_TRACE
+#if VM_TRACE
Verilated::traceEverOn(true);
tfp = new VerilatedVcdC;
top->trace(tfp, 99);
@@ -164,7 +164,7 @@ public:
}
~CoreSim() {
-#ifdef VM_TRACE
+#if VM_TRACE
if (tfp) { tfp->close(); delete tfp; }
#endif
delete top;
@@ -194,13 +194,13 @@ public:
// Rising edge
top->clk = 0;
top->eval();
-#ifdef VM_TRACE
+#if VM_TRACE
tfp->dump(sim_time++);
#endif
top->clk = 1;
top->eval();
-#ifdef VM_TRACE
+#if VM_TRACE
tfp->dump(sim_time++);
#endif