diff options
Diffstat (limited to 'backend/lib')
| -rw-r--r-- | backend/lib/CodeGen/MachineCombiner.cpp | 18 | ||||
| -rw-r--r-- | backend/lib/CodeGen/MachineOptimizationPipeline.cpp | 4 | ||||
| -rw-r--r-- | backend/lib/Target/RISCV/RISCVMachineCombiner.cpp | 3 |
3 files changed, 1 insertions, 24 deletions
diff --git a/backend/lib/CodeGen/MachineCombiner.cpp b/backend/lib/CodeGen/MachineCombiner.cpp index 90bedac..1075180 100644 --- a/backend/lib/CodeGen/MachineCombiner.cpp +++ b/backend/lib/CodeGen/MachineCombiner.cpp @@ -82,22 +82,6 @@ namespace { MachinePassChange::Registers}; return Value; }(); - static const MachinePassContract PostFrame = [] { - MachinePassContract Value{ - .Name = "machine-combiner-post-frame", - .Requires = {MachineFunctionProperty::Selected, MachineFunctionProperty::NoVRegs, - MachineFunctionProperty::FrameFinalized, - MachineFunctionProperty::NoFrameIndices}, - .Sets = {}, - .Clears = {}, - .RequiredAnalyses = {}, - .VerificationStage = PipelineStage::PostRAFinalized, - }; - Value.ThreadSafety = PassThreadSafety::ThreadSafe; - Value.DeclaredChanges = {MachinePassChange::Instructions, MachinePassChange::Operands, - MachinePassChange::Registers}; - return Value; - }(); switch (Stage) { case MachineCombinerStage::PreLegalizer: return PreLegalizer; @@ -107,8 +91,6 @@ namespace { return PreRA; case MachineCombinerStage::PostRegisterAllocation: return PostRA; - case MachineCombinerStage::PostFrame: - return PostFrame; } return PreLegalizer; } diff --git a/backend/lib/CodeGen/MachineOptimizationPipeline.cpp b/backend/lib/CodeGen/MachineOptimizationPipeline.cpp index 4d20f9a..f3ce86d 100644 --- a/backend/lib/CodeGen/MachineOptimizationPipeline.cpp +++ b/backend/lib/CodeGen/MachineOptimizationPipeline.cpp @@ -105,10 +105,6 @@ addPostRegisterAllocationPipeline(MachineFunctionPassManager &Pipeline, Added = addPass<PrologueEpilogueInsertionPass>(Pipeline, TargetInfo.FrameLowering); if (!Added) return std::unexpected(Added.error()); - Added = - addPass<MachineCombinerPass>(Pipeline, TargetInfo.Combiner, MachineCombinerStage::PostFrame); - if (!Added) - return std::unexpected(Added.error()); Added = addPass<MachineDCEPass>(Pipeline); if (!Added) return std::unexpected(Added.error()); diff --git a/backend/lib/Target/RISCV/RISCVMachineCombiner.cpp b/backend/lib/Target/RISCV/RISCVMachineCombiner.cpp index 78c764c..ffc27b0 100644 --- a/backend/lib/Target/RISCV/RISCVMachineCombiner.cpp +++ b/backend/lib/Target/RISCV/RISCVMachineCombiner.cpp @@ -15,8 +15,7 @@ namespace { [[nodiscard]] constexpr MachineCombinerStageMask allOptimizationStages() noexcept { return machineCombinerStageMask(MachineCombinerStage::SelectedSSA) | machineCombinerStageMask(MachineCombinerStage::PreRegisterAllocation) | - machineCombinerStageMask(MachineCombinerStage::PostRegisterAllocation) | - machineCombinerStageMask(MachineCombinerStage::PostFrame); + machineCombinerStageMask(MachineCombinerStage::PostRegisterAllocation); } [[nodiscard]] MachineCombinerPattern immediateIdentity(InstructionOpcode OpcodeValue, |