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-rw-r--r--backend/unittests/Target/RISCVCallLoweringTest.cpp21
-rw-r--r--backend/unittests/Target/RISCVCodeGenTest.cpp7
-rw-r--r--backend/unittests/Target/RISCVLateCodeGenTest.cpp2
-rw-r--r--backend/unittests/Target/RISCVTargetTest.cpp30
4 files changed, 47 insertions, 13 deletions
diff --git a/backend/unittests/Target/RISCVCallLoweringTest.cpp b/backend/unittests/Target/RISCVCallLoweringTest.cpp
index 7284887..08049f6 100644
--- a/backend/unittests/Target/RISCVCallLoweringTest.cpp
+++ b/backend/unittests/Target/RISCVCallLoweringTest.cpp
@@ -191,6 +191,7 @@ void testIntegerAndFloatingAssignments(TestContext &Context) {
if (!IntegerPlan)
return;
const auto IntegerAssignments = IntegerPlan->argumentAssignments();
+ const auto LP64DMask = rcc::riscv::createCallPreservedMask(rcc::riscv::CallingConvention::LP64D);
bool IntegerRegistersMatch = IntegerAssignments.size() == 9;
for (std::size_t Index = 0; IntegerRegistersMatch && Index < 8; ++Index)
IntegerRegistersMatch = isLocation(IntegerAssignments[Index], argumentGPR(Index));
@@ -200,7 +201,9 @@ void testIntegerAndFloatingAssignments(TestContext &Context) {
IntegerPlan->stackArguments().SizeBytes == 16 &&
IntegerPlan->callFrame().SizeBytes == 16 &&
IntegerPlan->callee()->targetFlags() ==
- static_cast<std::uint32_t>(rcc::riscv::CallTargetFlag::DirectCall),
+ static_cast<std::uint32_t>(rcc::riscv::CallTargetFlag::DirectCall) &&
+ LP64DMask != nullptr && IntegerPlan->preservedMask() != nullptr &&
+ *IntegerPlan->preservedMask() == *LP64DMask,
"LP64D integer arguments must use a0-a7 before a 16-byte stack area");
auto Floats = callRequest(floatingValues(17), 17);
@@ -247,6 +250,22 @@ void testIntegerAndFloatingAssignments(TestContext &Context) {
GenericScalarPlan->returnAssignments()[0].ValueType == anyScalar(64),
"LLVM generic scalar LLTs must use integer ABI transport without type loss");
+ auto LP64Float = callRequest({abiValue(floating(rcc::FloatSemantics::IEEEDouble), 0)}, 1);
+ LP64Float.Convention = rcc::riscv::callingConventionID(rcc::riscv::CallingConvention::LP64);
+ LP64Float.Results = {abiValue(floating(rcc::FloatSemantics::IEEEDouble), 0)};
+ auto LP64Plan = rcc::riscv::callLowering().planCall(LP64Float);
+ const auto LP64Mask = rcc::riscv::createCallPreservedMask(rcc::riscv::CallingConvention::LP64);
+ Context.expect(
+ LP64Plan && LP64Plan->argumentAssignments().size() == 1 &&
+ LP64Plan->returnAssignments().size() == 1 &&
+ isLocation(LP64Plan->argumentAssignments()[0], argumentGPR(0)) &&
+ isLocation(LP64Plan->returnAssignments()[0], returnGPR(0)) &&
+ LP64Plan->argumentAssignments()[0].CustomFlags.has(rcc::CCAssignmentFlag::Bitcast) &&
+ LP64Plan->returnAssignments()[0].CustomFlags.has(rcc::CCAssignmentFlag::Bitcast) &&
+ LP64Mask != nullptr && LP64Plan->preservedMask() != nullptr &&
+ *LP64Plan->preservedMask() == *LP64Mask,
+ "LP64 must transport floating values through GPRs and use the integer preserved mask");
+
auto Narrow = abiValue(integer(32), 0);
auto InvalidNarrow = callRequest({Narrow}, 1);
Context.expect(!rcc::riscv::callLowering().planCall(InvalidNarrow),
diff --git a/backend/unittests/Target/RISCVCodeGenTest.cpp b/backend/unittests/Target/RISCVCodeGenTest.cpp
index aa58989..fcf0e57 100644
--- a/backend/unittests/Target/RISCVCodeGenTest.cpp
+++ b/backend/unittests/Target/RISCVCodeGenTest.cpp
@@ -1219,10 +1219,15 @@ void testMultiplyLibcallWithoutM(TestContext &Context) {
}
}
const rcc::MachineOperand *Callee = Call == nullptr ? nullptr : Call->operandAt(0);
+ const rcc::MachineOperand *MaskOperand = Call == nullptr ? nullptr : Call->operandAt(1);
const auto *External = Callee == nullptr ? nullptr : Callee->getIf<rcc::ExternalSymbolOperand>();
+ const auto *CallMask =
+ MaskOperand == nullptr ? nullptr : MaskOperand->getIf<rcc::RegisterMaskOperand>();
+ const auto LP64Mask = rcc::riscv::createCallPreservedMask(rcc::riscv::CallingConvention::LP64);
Context.expect(Action && *Action == rcc::LegalizationAction::Libcall && Lowered &&
Multiply64.Instruction->parent() == nullptr && External != nullptr &&
- External->Name == "__muldi3" &&
+ External->Name == "__muldi3" && CallMask != nullptr && CallMask->Mask &&
+ LP64Mask != nullptr && *CallMask->Mask == *LP64Mask &&
Multiply64.Function->frameInfo().state().HasCalls,
"s64 G_MUL without M must lower through the LP64 __muldi3 call path");
diff --git a/backend/unittests/Target/RISCVLateCodeGenTest.cpp b/backend/unittests/Target/RISCVLateCodeGenTest.cpp
index 84ed796..5069137 100644
--- a/backend/unittests/Target/RISCVLateCodeGenTest.cpp
+++ b/backend/unittests/Target/RISCVLateCodeGenTest.cpp
@@ -1129,7 +1129,7 @@ void testPostRAPseudoExpansionAndFinalization(TestContext &Context,
return;
}
auto Call = Builder.buildInstr(opcode(rcc::riscv::InstructionOpcode::PseudoCALL));
- auto Preserved = rcc::riscv::createCallPreservedMask();
+ auto Preserved = rcc::riscv::createCallPreservedMask(rcc::riscv::CallingConvention::LP64D);
if (!Call || !Call->addExternalSymbol("callee", 0, 1) || !Call->addRegisterMask(Preserved) ||
!Call->addImplicitUse(physical(rcc::riscv::PhysicalRegisterID::X10)) || !Call->build()) {
Context.expect(false, "post-RA call pseudo construction must succeed");
diff --git a/backend/unittests/Target/RISCVTargetTest.cpp b/backend/unittests/Target/RISCVTargetTest.cpp
index e0ef604..1aa2d72 100644
--- a/backend/unittests/Target/RISCVTargetTest.cpp
+++ b/backend/unittests/Target/RISCVTargetTest.cpp
@@ -87,19 +87,25 @@ void testABIAndDebugFacts(TestContext &Context) {
const rcc::PhysicalRegister F10 = registerID(rcc::riscv::PhysicalRegisterID::F10);
const rcc::PhysicalRegister F31 = registerID(rcc::riscv::PhysicalRegisterID::F31);
- const auto Mask = rcc::riscv::createCallPreservedMask();
+ const auto LP64Mask = rcc::riscv::createCallPreservedMask(rcc::riscv::CallingConvention::LP64);
+ const auto LP64DMask = rcc::riscv::createCallPreservedMask(rcc::riscv::CallingConvention::LP64D);
Context.expect(
- Mask != nullptr && Mask->preserves(X1) && Mask->preserves(F8) && Mask->clobbers(X10) &&
- Mask->clobbers(F10),
- "LP64D preserved-mask facts must distinguish saved and caller-clobbered registers");
+ LP64DMask != nullptr && LP64DMask->preserves(X1) && LP64DMask->preserves(F8) &&
+ LP64DMask->clobbers(X10) && LP64DMask->clobbers(F10) && LP64Mask != nullptr &&
+ LP64Mask->preserves(X1) && LP64Mask->clobbers(F8) && LP64Mask->clobbers(X10),
+ "LP64 and LP64D masks must distinguish integer and floating callee-saved registers");
auto MIRText = rcc::riscv::createMIRTextInfo();
Context.expect(MIRText.has_value(), "RV64GC MIR text facts must be valid");
if (!MIRText)
return;
- Context.expect(MIRText->registerMasks().size() == 1 &&
- MIRText->registerMasks().front().Name == "csr_ilp32d_lp64d",
- "RV64GC must expose its named LP64D call-preserved mask");
+ const auto TextLP64Mask = MIRText->registerMask("csr_ilp32_lp64");
+ const auto TextLP64DMask = MIRText->registerMask("csr_ilp32d_lp64d");
+ Context.expect(MIRText->registerMasks().size() == 2 && TextLP64Mask != nullptr &&
+ LP64Mask != nullptr && *TextLP64Mask == *LP64Mask &&
+ TextLP64DMask != nullptr && LP64DMask != nullptr &&
+ *TextLP64DMask == *LP64DMask,
+ "RV64GC must expose named LP64 and LP64D call-preserved masks");
Context.expect(MIRText->directOperandFlagMask() == 31 &&
MIRText->directOperandFlag("riscv-call") == 1,
"RV64GC MIR target flags must expose the canonical direct-call spelling");
@@ -109,16 +115,20 @@ void testABIAndDebugFacts(TestContext &Context) {
"the final floating register DWARF number must map to f31");
const auto Conventions = rcc::riscv::callingConventions();
+ const auto *LP64 = rcc::riscv::callingConvention(rcc::riscv::CallingConvention::LP64);
const auto *LP64D = rcc::riscv::callingConvention(rcc::riscv::CallingConvention::LP64D);
Context.expect(
- Conventions.size() == 1 && LP64D != nullptr && LP64D->Name == "lp64d" &&
- LP64D->IntegerArgumentRegisters.size() == 8 &&
+ Conventions.size() == 2 && LP64 != nullptr && LP64->Name == "lp64" &&
+ LP64->IntegerArgumentRegisters.size() == 8 && LP64->FloatingArgumentRegisters.empty() &&
+ LP64->IntegerReturnRegisters.size() == 2 && LP64->FloatingReturnRegisters.empty() &&
+ LP64->PreservedMaskName == "CSR_ILP32_LP64" && LP64D != nullptr &&
+ LP64D->Name == "lp64d" && LP64D->IntegerArgumentRegisters.size() == 8 &&
LP64D->FloatingArgumentRegisters.size() == 8 &&
LP64D->IntegerReturnRegisters.size() == 2 && LP64D->FloatingReturnRegisters.size() == 2 &&
LP64D->StackAlignmentBytes == 16 && LP64D->StackArgumentAlignmentBytes == 16 &&
LP64D->SupportsVarArgs && LP64D->SupportsTailCalls &&
LP64D->PreservedMaskName == "CSR_ILP32D_LP64D",
- "LP64D calling-convention tables must expose register, stack, and tail-call facts");
+ "LP64 and LP64D calling-convention tables must expose complete ABI facts");
}
void testInstructionFacts(TestContext &Context) {
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 03:39:36 +0000