| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [GlobalISel] Narrow scalar shifts | Richard-Qin-X | 2026-08-15 | 2 | -2/+943 |
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| * | [MIR] Print target generic operand types | Richard-Qin-X | 2026-08-15 | 1 | -2/+2 |
| | | | | | Use the instruction descriptor's Generic flag when deduplicating LLT annotations so target-specific generic pseudos follow LLVM MIR spelling. | ||||
| * | [GlobalISel] Narrow scalar selects | Richard-Qin-X | 2026-08-15 | 2 | -10/+88 |
| | | | | | Match LLVM's narrowScalarSelect lowering for wide scalar values. Build widened sources from LLT destinations so CSE hits reuse the actual result register instead of introducing copies. | ||||
| * | [GlobalISel] Narrow scalar bitwise operations | Richard-Qin-X | 2026-08-15 | 2 | -0/+80 |
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| * | [GlobalISel] Legalize constants and implicit definitions | Richard-Qin-X | 2026-08-15 | 4 | -34/+196 |
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| * | [GlobalISel] Match LLVM CSE builder result semantics | Richard-Qin-X | 2026-08-15 | 23 | -393/+1568 |
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| * | [RISCV] Remove obsolete codegen tests | Richard-Qin-X | 2026-08-15 | 2 | -1771/+0 |
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| * | [GlobalISel] Legalize G_ABDS and G_ABDU | Richard-Qin-X | 2026-08-14 | 7 | -178/+175 |
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| * | [GlobalISel] Legalize G_ABS | Richard-Qin-X | 2026-08-14 | 12 | -31/+339 |
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| * | [RISCV] Legalize va_copy intrinsics | Richard-Qin-X | 2026-08-14 | 4 | -43/+191 |
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| * | [MIR] Normalize explicit successor probabilities | Richard-Qin-X | 2026-08-14 | 4 | -2/+71 |
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| * | [GlobalISel] Match LLVM legalization value tracking | Richard-Qin-X | 2026-08-14 | 19 | -478/+2712 |
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| * | [CodeGen] Match LLVM Legalizer ownership | Richard-Qin-X | 2026-08-14 | 27 | -3229/+4427 |
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| * | [CodeGen] Unify scalar low-level types | Richard-Qin-X | 2026-08-13 | 54 | -1196/+994 |
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| * | [CodeGen] Match LLVM machine copy propagation | Richard-Qin-X | 2026-08-13 | 12 | -246/+524 |
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| * | [CodeGen] Match LLVM branch relaxation semantics | Richard-Qin-X | 2026-08-13 | 9 | -17/+98 |
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| * | [MIRTool] Parse LLVM code generation options | Richard-Qin-X | 2026-08-13 | 1 | -0/+85 |
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| * | [RISCV] Model non-ISA subtarget features | Richard-Qin-X | 2026-08-13 | 2 | -8/+104 |
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| * | [MIRTool] Read stdin when no input path is given | Richard-Qin-X | 2026-08-13 | 1 | -2/+2 |
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| * | [RISCV] Match LLVM register bank mappings | Richard-Qin-X | 2026-08-13 | 8 | -81/+507 |
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| * | [MIR] Omit predictable successors in simplified output | Richard-Qin-X | 2026-08-13 | 3 | -24/+76 |
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| * | [CodeGen] Preserve LLT annotations on generic opcodes | Richard-Qin-X | 2026-08-13 | 1 | -2/+3 |
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| * | [CodeGen] Derive quality inputs from source list | Richard-Qin-X | 2026-08-13 | 1 | -163/+12 |
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| * | [RISCV] Preserve wide carry instruction order | Richard-Qin-X | 2026-08-13 | 1 | -10/+18 |
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| * | [RISCV] Centralize legalizer register type queries | Richard-Qin-X | 2026-08-13 | 1 | -118/+97 |
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| * | [RISCV] Merge duplicate encoding fixture cases | Richard-Qin-X | 2026-08-13 | 1 | -21/+2 |
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| * | [MIR] Use the container emptiness query | Richard-Qin-X | 2026-08-13 | 1 | -1/+1 |
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| * | [MIR] Qualify pointer iterators | Richard-Qin-X | 2026-08-13 | 1 | -3/+3 |
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| * | [Tooling] Avoid unchecked pipeline selectors | Richard-Qin-X | 2026-08-13 | 1 | -3/+2 |
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| * | [CodeGen] Reuse register diagnostic formatting | Richard-Qin-X | 2026-08-13 | 1 | -2/+1 |
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| * | [CodeGen] Avoid unchecked memory alignment access | Richard-Qin-X | 2026-08-13 | 1 | -2/+2 |
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| * | [Tooling] Restrict tidy to backend sources | Richard-Qin-X | 2026-08-13 | 1 | -2/+1 |
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| * | [CodeGen] Inline liveness test helpers | Richard-Qin-X | 2026-08-13 | 1 | -16/+16 |
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| * | [CodeGen] Remove duplicate analysis declarations | Richard-Qin-X | 2026-08-13 | 2 | -5/+0 |
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| * | [IR] Sequence analysis registration moves | Richard-Qin-X | 2026-08-13 | 1 | -2/+3 |
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| * | [TableGen] Fix quality tool source paths | Richard-Qin-X | 2026-08-13 | 2 | -0/+2 |
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| * | [Tooling] Remove the duplicate output kind | Richard-Qin-X | 2026-08-13 | 10 | -202/+108 |
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| * | [RISCV] Remove physical register forwarding helpers | Richard-Qin-X | 2026-08-13 | 3 | -57/+39 |
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| * | [RISCV] Use the generated opcode conversion | Richard-Qin-X | 2026-08-13 | 11 | -220/+198 |
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| * | [Support] Centralize error context handling | Richard-Qin-X | 2026-08-13 | 30 | -234/+119 |
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| * | [CodeGen] Remove the unused property query | Richard-Qin-X | 2026-08-13 | 2 | -5/+0 |
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| * | [TableGen] Split the target description generator | Richard-Qin-X | 2026-08-13 | 30 | -3161/+3516 |
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| * | [IR] Split LL parsing, assembly writing, and data layout | Richard-Qin-X | 2026-08-13 | 28 | -2414/+2404 |
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| * | [Support] Split APInt and APFloat ownership | Richard-Qin-X | 2026-08-13 | 34 | -2004/+1994 |
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| * | [CodeGen] Align MIR parser and printer ownership | Richard-Qin-X | 2026-08-13 | 36 | -4853/+4505 |
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| * | [CodeGen] Align pass manager ownership | Richard-Qin-X | 2026-08-13 | 108 | -2534/+2435 |
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| * | [CodeGen] Split machine liveness components | Richard-Qin-X | 2026-08-13 | 64 | -2604/+3051 |
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| * | [CodeGen] Split PHI elimination and two-address rewriting | Richard-Qin-X | 2026-08-13 | 13 | -1723/+1917 |
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| * | [RISCV] Split the GlobalISel target components | Richard-Qin-X | 2026-08-12 | 50 | -6937/+7097 |
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| * | [GlobalISel] Split the generic pipeline components | Richard-Qin-X | 2026-08-12 | 24 | -1633/+2003 |
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