| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Implement push-pop optimization | Richard-Qin-X | 2026-08-26 | 1 | -4/+6 |
| | | |||||
| * | [RISCV] Match LLVM emergency spill layout | Richard-Qin-X | 2026-08-24 | 1 | -0/+2 |
| | | |||||
| * | [CodeGen] Generate RISC-V macro fusion rules | Richard-Qin-X | 2026-08-22 | 1 | -0/+2 |
| | | |||||
| * | [CodeGen] Match LLVM machine copy propagation | Richard-Qin-X | 2026-08-13 | 1 | -1/+6 |
| | | |||||
| * | [CodeGen] Align pass manager ownership | Richard-Qin-X | 2026-08-13 | 1 | -5/+6 |
| | | |||||
| * | [RISCV] Consolidate instruction behavior in RISCVInstrInfo | Richard-Qin-X | 2026-08-12 | 1 | -3/+1 |
| | | |||||
| * | [CodeGen] Add TargetInstrInfo ownership | Richard-Qin-X | 2026-08-12 | 1 | -2/+2 |
| | | |||||
| * | [CodeGen] Implement machine optimization and scheduling | Richard-Qin-X | 2026-08-09 | 1 | -0/+43 |
