| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen] Implement machine SSA exit | Richard-Qin-X | 2026-08-08 | 1 | -4/+3 |
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| * | [CodeGen] Add target MIR text schema | Richard-Qin-X | 2026-08-03 | 1 | -6/+17 |
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| * | [CodeGen] Add target register descriptions | Richard-Qin-X | 2026-08-01 | 1 | -0/+98 |
| Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage. | |||||
