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path: root/backend/include/rcc/CodeGen/TargetDescription.h
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* [GlobalISel] Match LLVM legalization value trackingRichard-Qin-X2026-08-141-5/+26
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* [CodeGen] Implement machine SSA exitRichard-Qin-X2026-08-081-4/+3
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* [CodeGen] Add target MIR text schemaRichard-Qin-X2026-08-031-6/+17
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* [CodeGen] Add target register descriptionsRichard-Qin-X2026-08-011-0/+98
Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage.