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An optimizing compiler for C.
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rcc
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TableGen
Commit message (
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Author
Age
Files
Lines
*
[GlobalISel] Generate floating memory selection
Richard-Qin-X
2026-08-27
1
-1
/
+2
*
[RISCV] Generate MC pseudo lowering
Richard-Qin-X
2026-08-22
1
-0
/
+15
*
[CodeGen] Generate RISC-V macro fusion rules
Richard-Qin-X
2026-08-22
1
-0
/
+47
*
[GlobalISel] Generate prelegalizer combiner rules
Richard-Qin-X
2026-08-19
1
-0
/
+44
*
[RISCV][GlobalISel] Generate integer load selection
Richard-Qin-X
2026-08-19
1
-0
/
+7
*
[RISCV][GlobalISel] Match floating comparisons
Richard-Qin-X
2026-08-19
1
-0
/
+7
*
[RISCV][GlobalISel] Generate indirect branch selection
Richard-Qin-X
2026-08-19
1
-0
/
+1
*
[RISCV][GlobalISel] Generate conditional branch selection
Richard-Qin-X
2026-08-17
1
-0
/
+1
*
[RISCV][GlobalISel] Generate integer extension selections
Richard-Qin-X
2026-08-17
1
-7
/
+20
*
[RISCV][GlobalISel] Generate shift selections
Richard-Qin-X
2026-08-16
1
-0
/
+18
*
[RISCV][GlobalISel] Generate integer comparisons
Richard-Qin-X
2026-08-16
1
-4
/
+26
*
[RISCV][GlobalISel] Select comparisons against zero
Richard-Qin-X
2026-08-16
1
-0
/
+23
*
tablegen: Generate GlobalISel match tables
Richard-Qin-X
2026-08-16
1
-0
/
+38
*
[RISCV][GlobalISel] Legalize floating-point to integer conversions
Richard-Qin-X
2026-08-15
1
-0
/
+1
*
[CodeGen] Match LLVM branch relaxation semantics
Richard-Qin-X
2026-08-13
1
-0
/
+1
*
[TableGen] Split the target description generator
Richard-Qin-X
2026-08-13
2
-0
/
+255