| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen] Add target machine registry | Richard-Qin-X | 2026-08-28 | 1 | -11/+3 |
| * | [CodeGen] Implement RISC-V machine outlining | Richard-Qin-X | 2026-08-25 | 1 | -0/+3 |
| * | [RISCV] Match LLVM emergency spill layout | Richard-Qin-X | 2026-08-24 | 1 | -0/+1 |
| * | [CodeGen] Generate RISC-V macro fusion rules | Richard-Qin-X | 2026-08-22 | 1 | -0/+1 |
| * | [RISCV][GlobalISel] Legalize floating-point remainder | Richard-Qin-X | 2026-08-15 | 1 | -0/+1 |
| * | [GlobalISel] Match LLVM CSE builder result semantics | Richard-Qin-X | 2026-08-15 | 1 | -0/+2 |
| * | [CodeGen] Match LLVM machine copy propagation | Richard-Qin-X | 2026-08-13 | 1 | -2/+8 |
| * | [CodeGen] Align pass manager ownership | Richard-Qin-X | 2026-08-13 | 1 | -2/+2 |
| * | [RISCV] Split the GlobalISel target components | Richard-Qin-X | 2026-08-12 | 1 | -7/+3 |
| * | [Tooling] Remove the duplicate assembly emitter | Richard-Qin-X | 2026-08-12 | 1 | -5/+0 |
| * | [RISCV] Honor invocation subtarget features | Richard-Qin-X | 2026-08-11 | 1 | -0/+6 |
| * | [Tooling] Complete backend tooling and validation | Richard-Qin-X | 2026-08-10 | 1 | -0/+35 |
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| A collection of projects, including a C compiler, binutils, a memory allocator, an automated theorem prover, and a web browser. |
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