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An optimizing compiler for C.
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Author
Age
Files
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*
[GlobalISel] Lower funnel shifts
Richard-Qin-X
2026-08-15
1
-0
/
+1
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*
[RISCV][GlobalISel] Legalize floating-point remainder
Richard-Qin-X
2026-08-15
5
-6
/
+21
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*
[RISCV][GlobalISel] Legalize floating-point to integer conversions
Richard-Qin-X
2026-08-15
1
-0
/
+1
|
*
[GlobalISel] Lower stack operations
Richard-Qin-X
2026-08-15
2
-5
/
+30
|
*
[GlobalISel] Legalize scalar PHI operations
Richard-Qin-X
2026-08-15
1
-0
/
+2
|
*
[RISCV][GlobalISel] Legalize scalar bit count operations
Richard-Qin-X
2026-08-15
2
-0
/
+3
|
*
[GlobalISel] Lower byte-swap operations
Richard-Qin-X
2026-08-15
1
-0
/
+1
|
*
[GlobalISel] Lower combined division and remainder
Richard-Qin-X
2026-08-15
1
-0
/
+1
|
*
[GlobalISel] Lower integer operations to libcalls
Richard-Qin-X
2026-08-15
3
-7
/
+22
|
*
[GlobalISel] Lower integer rotate operations
Richard-Qin-X
2026-08-15
1
-0
/
+1
|
*
[GlobalISel] Preserve worklists when moving CSE instructions
Richard-Qin-X
2026-08-15
1
-0
/
+3
|
*
[GlobalISel] Lower three-way integer comparisons
Richard-Qin-X
2026-08-15
1
-0
/
+1
|
*
[GlobalISel] Lower integer min/max operations
Richard-Qin-X
2026-08-15
1
-0
/
+1
|
*
[GlobalISel] Legalize scalar pointer casts
Richard-Qin-X
2026-08-15
1
-0
/
+3
|
*
[GlobalISel] Narrow scalar shifts
Richard-Qin-X
2026-08-15
1
-0
/
+30
|
*
[GlobalISel] Narrow scalar selects
Richard-Qin-X
2026-08-15
1
-0
/
+2
|
|
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Match LLVM's narrowScalarSelect lowering for wide scalar values. Build widened sources from LLT destinations so CSE hits reuse the actual result register instead of introducing copies.
*
[GlobalISel] Narrow scalar bitwise operations
Richard-Qin-X
2026-08-15
1
-0
/
+2
|
*
[GlobalISel] Legalize constants and implicit definitions
Richard-Qin-X
2026-08-15
1
-0
/
+1
|
*
[GlobalISel] Match LLVM CSE builder result semantics
Richard-Qin-X
2026-08-15
11
-62
/
+322
|
*
[GlobalISel] Legalize G_ABDS and G_ABDU
Richard-Qin-X
2026-08-14
3
-0
/
+7
|
*
[GlobalISel] Legalize G_ABS
Richard-Qin-X
2026-08-14
5
-21
/
+32
|
*
[RISCV] Legalize va_copy intrinsics
Richard-Qin-X
2026-08-14
1
-43
/
+36
|
*
[MIR] Normalize explicit successor probabilities
Richard-Qin-X
2026-08-14
1
-0
/
+3
|
*
[GlobalISel] Match LLVM legalization value tracking
Richard-Qin-X
2026-08-14
8
-426
/
+532
|
*
[CodeGen] Match LLVM Legalizer ownership
Richard-Qin-X
2026-08-14
13
-8
/
+2333
|
*
[CodeGen] Unify scalar low-level types
Richard-Qin-X
2026-08-13
5
-77
/
+55
|
*
[CodeGen] Match LLVM machine copy propagation
Richard-Qin-X
2026-08-13
5
-13
/
+36
|
*
[CodeGen] Match LLVM branch relaxation semantics
Richard-Qin-X
2026-08-13
2
-0
/
+2
|
*
[RISCV] Model non-ISA subtarget features
Richard-Qin-X
2026-08-13
1
-1
/
+34
|
*
[RISCV] Match LLVM register bank mappings
Richard-Qin-X
2026-08-13
2
-5
/
+18
|
*
[MIR] Omit predictable successors in simplified output
Richard-Qin-X
2026-08-13
1
-0
/
+7
|
*
[CodeGen] Remove duplicate analysis declarations
Richard-Qin-X
2026-08-13
2
-5
/
+0
|
*
[IR] Sequence analysis registration moves
Richard-Qin-X
2026-08-13
1
-2
/
+3
|
*
[Tooling] Remove the duplicate output kind
Richard-Qin-X
2026-08-13
3
-18
/
+6
|
*
[Support] Centralize error context handling
Richard-Qin-X
2026-08-13
1
-0
/
+2
|
*
[CodeGen] Remove the unused property query
Richard-Qin-X
2026-08-13
1
-1
/
+0
|
*
[TableGen] Split the target description generator
Richard-Qin-X
2026-08-13
2
-0
/
+255
|
*
[IR] Split LL parsing, assembly writing, and data layout
Richard-Qin-X
2026-08-13
8
-61
/
+128
|
*
[Support] Split APInt and APFloat ownership
Richard-Qin-X
2026-08-13
8
-118
/
+176
|
*
[CodeGen] Align MIR parser and printer ownership
Richard-Qin-X
2026-08-13
8
-231
/
+167
|
*
[CodeGen] Align pass manager ownership
Richard-Qin-X
2026-08-13
42
-826
/
+1142
|
*
[CodeGen] Split machine liveness components
Richard-Qin-X
2026-08-13
9
-416
/
+542
|
*
[CodeGen] Split PHI elimination and two-address rewriting
Richard-Qin-X
2026-08-13
3
-49
/
+62
|
*
[RISCV] Split the GlobalISel target components
Richard-Qin-X
2026-08-12
6
-104
/
+50
|
*
[GlobalISel] Split the generic pipeline components
Richard-Qin-X
2026-08-12
9
-169
/
+229
|
*
[RISCV] Consolidate instruction behavior in RISCVInstrInfo
Richard-Qin-X
2026-08-12
6
-54
/
+31
|
*
[CodeGen] Add TargetInstrInfo ownership
Richard-Qin-X
2026-08-12
10
-30
/
+30
|
*
[Tooling] Remove the duplicate assembly emitter
Richard-Qin-X
2026-08-12
1
-5
/
+0
|
*
[Tooling] Complete the LLVM MIR command-line contract
Richard-Qin-X
2026-08-12
4
-30
/
+78
|
*
[Tooling] Adopt LLVM MIR command-line spellings
Richard-Qin-X
2026-08-12
2
-0
/
+2
|
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