| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen] Centralize machine instruction erasure | Richard-Qin-X | 2026-08-28 | 1 | -0/+6 |
| * | [CodeGen] Match LLVM machine debug stripping | Richard-Qin-X | 2026-08-22 | 1 | -0/+16 |
| * | [CodeGen] Implement RV64GC frame lowering | Richard-Qin-X | 2026-08-09 | 1 | -0/+14 |
| * | [MIR] Add machine instruction parser and printer | Richard-Qin-X | 2026-08-04 | 1 | -0/+69 |
| * | [CodeGen] Model machine debug metadata | Richard-Qin-X | 2026-08-02 | 1 | -0/+9 |
| * | [CodeGen] Track debug instruction identities | Richard-Qin-X | 2026-08-01 | 1 | -0/+26 |
| * | [CodeGen] Add transactional MachineIR builder | Richard-Qin-X | 2026-08-01 | 1 | -4/+4 |
| * | [CodeGen] Build the core MachineIR object model | Richard-Qin-X | 2026-08-01 | 1 | -0/+199 |
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