| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Consolidate instruction behavior in RISCVInstrInfo | Richard-Qin-X | 2026-08-12 | 1 | -8/+8 |
| * | [Tooling] Complete the LLVM MIR command-line contract | Richard-Qin-X | 2026-08-12 | 1 | -2/+2 |
| * | [Tooling] Complete backend tooling and validation | Richard-Qin-X | 2026-08-10 | 1 | -26/+77 |
| * | [CodeGen] Implement machine liveness analysis | Richard-Qin-X | 2026-08-09 | 1 | -32/+20 |
| * | [CodeGen] Implement machine SSA exit | Richard-Qin-X | 2026-08-08 | 1 | -0/+1090 |
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| An optimizing compiler for C. |
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