rcc-project - A collection of projects, including a C compiler, binutils, a memory allocator, an automated theorem prover, and a web browser.

	Commit message (Collapse)	Author	Age	Files	Lines
*	[RISCV][GlobalISel] Generate integer comparisons	Richard-Qin-X	2026-08-16	1	-3/+10
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*	[GlobalISel] Lower stack operations	Richard-Qin-X	2026-08-15	1	-2/+9
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*	[GlobalISel] Match LLVM legalization value tracking	Richard-Qin-X	2026-08-14	1	-2/+4
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*	[CodeGen] Unify scalar low-level types	Richard-Qin-X	2026-08-13	1	-1/+1
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*	[CodeGen] Implement machine SSA exit	Richard-Qin-X	2026-08-08	1	-1/+7
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*	[RISCV] Add generated RV64GC register description	Richard-Qin-X	2026-08-07	1	-5/+12
\| \| \| \|	Add an RCC-owned build-time target description generator and the initial RV64GC register model. Keep ABI aliases separate from canonical MIR register spelling.
*	[CodeGen] Add target MIR text schema	Richard-Qin-X	2026-08-03	1	-2/+132
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*	[CodeGen] Model complete MIR operands	Richard-Qin-X	2026-08-03	1	-0/+7
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*	[CodeGen] Add target register descriptions	Richard-Qin-X	2026-08-01	1	-0/+610
	Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage.