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Commit message (Collapse)AuthorAgeFilesLines
* [RISCV] Match LLVM emergency spill layoutRichard-Qin-X2026-08-244-11/+8
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* [CodeGen] Match LLVM machine combiner semanticsRichard-Qin-X2026-08-243-240/+146
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* [RISCV] Match LLVM frame lowering semanticsRichard-Qin-X2026-08-244-51/+3
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* [CodeGen] Implement RISC-V peephole branch optimizationRichard-Qin-X2026-08-243-1/+104
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* [CodeGen] Match LLVM machine debug strippingRichard-Qin-X2026-08-224-1/+54
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* [CodeGen] Generate RISC-V macro fusion rulesRichard-Qin-X2026-08-228-38/+347
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* [CodeGen] Match LLVM final verifier contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Match LLVM finalization contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Match LLVM late pseudo contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Remove RCC fallthrough normalizationRichard-Qin-X2026-08-193-169/+0
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* [CodeGen] Match LLVM block placement contractRichard-Qin-X2026-08-191-6/+2
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* [CodeGen] Unify LLVM branch folding pipelineRichard-Qin-X2026-08-194-424/+304
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* [CodeGen] Match LLVM tail duplication contractRichard-Qin-X2026-08-191-9/+1
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* [CodeGen] Match LLVM post-machine scheduler contractRichard-Qin-X2026-08-191-7/+1
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* [CodeGen] Match LLVM post-RA pseudo expansion contractRichard-Qin-X2026-08-191-7/+1
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* [CodeGen] Remove non-LLVM machine DCE placementsRichard-Qin-X2026-08-191-6/+0
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* [CodeGen] Remove unsupported post-frame combinerRichard-Qin-X2026-08-192-22/+0
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* [CodeGen] Remove unsupported pre-PEI pseudo expansionRichard-Qin-X2026-08-192-39/+2
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* [CodeGen] Match LLVM shrink wrapping contractRichard-Qin-X2026-08-191-7/+1
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* [CodeGen] Match LLVM post-RA sink contractRichard-Qin-X2026-08-191-3/+1
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* [CodeGen] Match LLVM post-RA LICM contractRichard-Qin-X2026-08-191-3/+1
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* [CodeGen] Match LLVM post-RA combiner contractRichard-Qin-X2026-08-191-1/+1
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* [CodeGen] Match LLVM stack slot coloring contractRichard-Qin-X2026-08-191-6/+1
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* [CodeGen] Match LLVM PBQP allocator input contractRichard-Qin-X2026-08-191-4/+2
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* [CodeGen] Match LLVM machine scheduler contractRichard-Qin-X2026-08-191-6/+1
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* [CodeGen] Match LLVM machine sink input contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Match LLVM prologepilog input contractRichard-Qin-X2026-08-191-2/+1
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* [GlobalISel] Generate prelegalizer combiner rulesRichard-Qin-X2026-08-193-3/+329
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* [RISCV][GlobalISel] Select and expand global addressesRichard-Qin-X2026-08-194-5/+50
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* [RISCV][GlobalISel] Generate integer load selectionRichard-Qin-X2026-08-191-0/+28
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* [RISCV][GlobalISel] Match floating comparisonsRichard-Qin-X2026-08-192-10/+50
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* [RISCV][GlobalISel] Generate conditional branch selectionRichard-Qin-X2026-08-171-5/+27
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* [RISCV][GlobalISel] Constrain core copies during selectionRichard-Qin-X2026-08-171-10/+14
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* [GlobalISel] Remove redundant virtual copies after selectionRichard-Qin-X2026-08-171-2/+42
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* [RISCV][GlobalISel] Generate integer extension selectionsRichard-Qin-X2026-08-171-33/+74
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* [RISCV][GlobalISel] Generate shift selectionsRichard-Qin-X2026-08-162-46/+374
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* [RISCV][GlobalISel] Generate integer comparisonsRichard-Qin-X2026-08-163-132/+570
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* [RISCV][GlobalISel] Select comparisons against zeroRichard-Qin-X2026-08-161-18/+274
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* tablegen: Generate GlobalISel match tablesRichard-Qin-X2026-08-162-0/+255
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* [GlobalISel] Propagate no-fp-except flagsRichard-Qin-X2026-08-161-0/+37
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* [GlobalISel] Delete dead instructions before selectionRichard-Qin-X2026-08-161-11/+1
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* [RISCV][GlobalISel] Select constant operands as immediatesRichard-Qin-X2026-08-162-7/+24
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* [GlobalISel] Clear virtual register types after selectionRichard-Qin-X2026-08-152-2/+6
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* [GlobalISel] Preserve MIR live-ins during selectionRichard-Qin-X2026-08-151-20/+0
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* [GlobalISel] Lower inline memory copiesRichard-Qin-X2026-08-151-6/+104
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* [GlobalISel] Legalize scalar memory operationsRichard-Qin-X2026-08-151-0/+759
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* [GlobalISel] Legalize saturating arithmeticRichard-Qin-X2026-08-151-0/+362
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* [GlobalISel] Legalize signed extended add/subRichard-Qin-X2026-08-151-16/+178
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* [GlobalISel] Legalize multiply with overflowRichard-Qin-X2026-08-151-0/+196
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* [GlobalISel] Legalize multi-precision multiplicationRichard-Qin-X2026-08-151-0/+268
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generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 11:46:26 +0000