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* [CodeGen] Match LLVM Legalizer ownershipRichard-Qin-X2026-08-141-0/+54
* [Support] Centralize error context handlingRichard-Qin-X2026-08-131-0/+5
* [Support] Split APInt and APFloat ownershipRichard-Qin-X2026-08-133-1/+1738
* [RISCV] Split the GlobalISel target componentsRichard-Qin-X2026-08-121-3/+3
* [MIR] Accept fixed-baseline LLVM syntaxRichard-Qin-X2026-08-112-10/+37
* [Tooling] Complete backend tooling and validationRichard-Qin-X2026-08-103-1/+165
* [MC] Implement RV64GC object emissionRichard-Qin-X2026-08-091-0/+8
* [MC] Implement RV64GC assembly emissionRichard-Qin-X2026-08-091-0/+2
* [CodeGen] Implement machine optimization and schedulingRichard-Qin-X2026-08-091-0/+10
* [CodeGen] Implement RV64GC frame loweringRichard-Qin-X2026-08-091-0/+2
* [CodeGen] Complete register allocation infrastructureRichard-Qin-X2026-08-091-0/+2
* [Support] Add MIR YAML parsing infrastructureRichard-Qin-X2026-08-013-2/+1318
* [Backend] Establish standalone build infrastructureRichard-Qin-X2026-08-012-0/+68
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 13:04:39 +0000