| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Split the GlobalISel target components | Richard-Qin-X | 2026-08-12 | 1 | -1512/+0 |
| * | [RISCV] Model typed floating-point register views | Richard-Qin-X | 2026-08-11 | 1 | -10/+37 |
| * | [RISCV] Order call operands like LLVM MIR | Richard-Qin-X | 2026-08-11 | 1 | -8/+8 |
| * | [RISCV] Add LP64 calling-convention facts | Richard-Qin-X | 2026-08-11 | 1 | -49/+63 |
| * | [CodeGen] Remove redundant numeric call-site IDs | Richard-Qin-X | 2026-08-11 | 1 | -8/+2 |
| * | [RISCV] Match LLVM call-frame pseudo semantics | Richard-Qin-X | 2026-08-11 | 1 | -13/+12 |
| * | [RISCV] Use canonical copies for full ABI values | Richard-Qin-X | 2026-08-11 | 1 | -4/+10 |
| * | [RISCV] Accept generic scalars in call lowering | Richard-Qin-X | 2026-08-11 | 1 | -3/+2 |
| * | [CodeGen] Complete machine pass and ABI lowering infrastructure | Richard-Qin-X | 2026-08-07 | 1 | -0/+1473 |
