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path: root/backend/unittests/CodeGen/CMakeLists.txt
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* [CodeGen] Implement machine optimization and schedulingRichard-Qin-X2026-08-091-0/+22
* [CodeGen] Complete register allocation infrastructureRichard-Qin-X2026-08-091-0/+85
* [CodeGen] Implement machine liveness analysisRichard-Qin-X2026-08-091-0/+15
* [CodeGen] Implement machine SSA exitRichard-Qin-X2026-08-081-0/+11
* [CodeGen] Implement RV64GC legalization and instruction selectionRichard-Qin-X2026-08-081-0/+14
* [CodeGen] Complete machine pass and ABI lowering infrastructureRichard-Qin-X2026-08-071-0/+48
* [CodeGen] Add target MIR text schemaRichard-Qin-X2026-08-031-0/+15
* [CodeGen] Model complete MIR operandsRichard-Qin-X2026-08-031-0/+15
* [CodeGen] Add machine metadata graphsRichard-Qin-X2026-08-021-0/+15
* [CodeGen] Track debug instruction identitiesRichard-Qin-X2026-08-011-0/+15
* [CodeGen] Add machine function recordsRichard-Qin-X2026-08-011-0/+18
* [CodeGen] Add MIR function and block attributesRichard-Qin-X2026-08-011-0/+15
* [MIR] Add compilation unit reference contextRichard-Qin-X2026-08-011-0/+12
* [CodeGen] Add target register descriptionsRichard-Qin-X2026-08-011-4/+40
* [CodeGen] Add target state and compilation statusRichard-Qin-X2026-08-011-0/+30
* [CodeGen] Add constant and jump table stateRichard-Qin-X2026-08-011-0/+36
* [CodeGen] Add MachineFrameInfoRichard-Qin-X2026-08-011-0/+12
* [CodeGen] Add explicit MachineFunction cloningRichard-Qin-X2026-08-011-0/+18
* [CodeGen] Add strict MachineIR verificationRichard-Qin-X2026-08-011-0/+15
* [CodeGen] Add transactional MachineIR builderRichard-Qin-X2026-08-011-0/+15
* [CodeGen] Add machine instruction descriptorsRichard-Qin-X2026-08-011-0/+18
* [CodeGen] Build the core MachineIR object modelRichard-Qin-X2026-08-011-0/+12
* [CodeGen] Add machine IR value semanticsRichard-Qin-X2026-08-011-5/+20
* [CodeGen] Add core machine type primitivesRichard-Qin-X2026-08-011-0/+16
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 09:05:01 +0000