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path: root/backend/unittests/Target/CMakeLists.txt
Commit message (Expand)AuthorAgeFilesLines
* [CMake] Remove unused clang-tidy file registrationRichard-Qin-X2026-08-281-14/+0
* [RISCV] Remove obsolete codegen testsRichard-Qin-X2026-08-151-7/+0
* [TableGen] Split the target description generatorRichard-Qin-X2026-08-131-9/+6
* [RISCV] Split the GlobalISel target componentsRichard-Qin-X2026-08-121-8/+2
* [RISCV] Consolidate instruction behavior in RISCVInstrInfoRichard-Qin-X2026-08-121-0/+8
* [MC] Implement RV64GC object emissionRichard-Qin-X2026-08-091-0/+30
* [MC] Implement RV64GC assembly emissionRichard-Qin-X2026-08-091-0/+13
* [CodeGen] Implement machine optimization and schedulingRichard-Qin-X2026-08-091-0/+13
* [CodeGen] Implement RV64GC frame loweringRichard-Qin-X2026-08-091-0/+13
* [CodeGen] Complete register allocation infrastructureRichard-Qin-X2026-08-091-0/+13
* [CodeGen] Implement machine SSA exitRichard-Qin-X2026-08-081-0/+7
* [CodeGen] Implement RV64GC legalization and instruction selectionRichard-Qin-X2026-08-081-0/+7
* [CodeGen] Complete machine pass and ABI lowering infrastructureRichard-Qin-X2026-08-071-0/+7
* [RISCV] Add generated RV64GC register descriptionRichard-Qin-X2026-08-071-1/+20
* [CodeGen] Add target register descriptionsRichard-Qin-X2026-08-011-0/+17
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 04:21:09 +0000