1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
|
// SPDX-License-Identifier: GPL-3.0-or-later
#include "rcc/Target/RISCV/RISCVInstPrinter.h"
#include "rcc/CodeGen/Register.h"
#include "rcc/MC/MCExpr.h"
#include "rcc/MC/MCInst.h"
#include "rcc/MC/MCInstPrinter.h"
#include "rcc/Target/RISCV/RISCVTarget.h"
#include <array>
#include <charconv>
#include <cstddef>
#include <cstdint>
#include <optional>
#include <ranges>
#include <string>
#include <string_view>
namespace rcc::riscv {
namespace {
struct LinearFormat final {
std::string_view Name;
std::size_t OperandCount = 0;
};
constexpr std::array LinearFormats{
LinearFormat{"none", 0},
LinearFormat{"rd-imm", 2},
LinearFormat{"rd-rs1-imm", 3},
LinearFormat{"rd-rs1-rs2", 3},
LinearFormat{"rs1-rs2-target", 3},
LinearFormat{"rd-target", 2},
LinearFormat{"imm-imm", 2},
LinearFormat{"rd-csr-rs1", 3},
LinearFormat{"rd-csr-imm", 3},
LinearFormat{"frd-frs1-frs2-rm", 4},
LinearFormat{"frd-frs1-frs2-frs3-rm", 5},
LinearFormat{"frd-frs1-rm", 3},
LinearFormat{"frd-frs1-frs2", 3},
LinearFormat{"rd-frs1-rm", 3},
LinearFormat{"rd-frs1", 2},
LinearFormat{"rd-frs1-frs2", 3},
LinearFormat{"frd-rs1-rm", 3},
LinearFormat{"frd-rs1", 2},
LinearFormat{"target", 1},
LinearFormat{"rs1-target", 2},
LinearFormat{"rs1", 1},
LinearFormat{"rd-rs2", 2},
LinearFormat{"rd-rs1", 2},
};
[[nodiscard]] const AssemblyFormatInfo *assemblyFormat(AssemblyFormatID ID) noexcept {
const auto Formats = assemblyFormats();
const auto Position = std::ranges::find(Formats, ID, &AssemblyFormatInfo::ID);
return Position == Formats.end() ? nullptr : &*Position;
}
[[nodiscard]] std::optional<std::size_t> linearOperandCount(std::string_view Name) noexcept {
const auto *const Position = std::ranges::find(LinearFormats, Name, &LinearFormat::Name);
return Position == LinearFormats.end() ? std::nullopt : std::optional(Position->OperandCount);
}
[[nodiscard]] Expected<void> requireOperandCount(const mc::MCInst &Instruction,
std::size_t ExpectedCount) {
if (Instruction.operands().size() != ExpectedCount) {
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V assembly format has an unexpected operand count");
}
return {};
}
[[nodiscard]] std::string hexValue(std::uint64_t Value) {
std::array<char, 16> Digits{};
const auto [End, Error] = std::to_chars(Digits.data(), Digits.data() + Digits.size(), Value, 16);
if (Error != std::errc{})
return {};
return "0x" + std::string(Digits.data(), End);
}
[[nodiscard]] Expected<std::string> formatOperand(const mc::MCOperand &Operand,
const TargetDescription &Target,
const mc::MCInstPrinter &Printer) {
if (const mc::MCRegister *Register = Operand.registerValue(); Register != nullptr) {
auto Physical = PhysicalRegister::create(Register->value());
if (!Physical)
return std::unexpected(Physical.error());
const auto Name = Target.registers().physicalRegisterMIRName(*Physical);
if (!Name) {
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V MC instruction references an unknown register");
}
std::string AssemblyName(*Name);
if (AssemblyName.ends_with("_f") || AssemblyName.ends_with("_d"))
AssemblyName.resize(AssemblyName.size() - 2);
return AssemblyName;
}
if (const std::int64_t *Immediate = Operand.immediateValue(); Immediate != nullptr)
return std::to_string(*Immediate);
if (const std::uint32_t *Bits = Operand.float32BitsValue(); Bits != nullptr)
return hexValue(*Bits);
if (const std::uint64_t *Bits = Operand.float64BitsValue(); Bits != nullptr)
return hexValue(*Bits);
if (const mc::MCExprRef *Expression = Operand.expressionValue(); Expression != nullptr) {
if (!*Expression)
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V MC instruction has a null expression operand");
return mc::printMCExpression(**Expression, Printer);
}
return makeUnexpected(ErrorCode::InternalError, "RISC-V MC operand storage is invalid");
}
[[nodiscard]] Expected<std::string> formatRegisterOperand(const mc::MCInst &Instruction,
std::size_t Index,
const TargetDescription &Target,
const mc::MCInstPrinter &Printer) {
if (Index >= Instruction.operands().size() ||
Instruction.operands()[Index].registerValue() == nullptr) {
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V assembly format requires a register operand");
}
return formatOperand(Instruction.operands()[Index], Target, Printer);
}
[[nodiscard]] Expected<std::string> formatAnyOperand(const mc::MCInst &Instruction,
std::size_t Index,
const TargetDescription &Target,
const mc::MCInstPrinter &Printer) {
if (Index >= Instruction.operands().size()) {
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V assembly format references an absent operand");
}
return formatOperand(Instruction.operands()[Index], Target, Printer);
}
[[nodiscard]] Expected<std::string> formatAddress(const mc::MCInst &Instruction,
std::size_t OffsetIndex, std::size_t BaseIndex,
const TargetDescription &Target,
const mc::MCInstPrinter &Printer) {
auto Offset = formatAnyOperand(Instruction, OffsetIndex, Target, Printer);
if (!Offset)
return std::unexpected(Offset.error());
auto Base = formatRegisterOperand(Instruction, BaseIndex, Target, Printer);
if (!Base)
return std::unexpected(Base.error());
return *Offset + "(" + *Base + ")";
}
[[nodiscard]] Expected<std::string> joinOperands(const mc::MCInst &Instruction, std::size_t Count,
const TargetDescription &Target,
const mc::MCInstPrinter &Printer) {
auto CountResult = requireOperandCount(Instruction, Count);
if (!CountResult)
return std::unexpected(CountResult.error());
std::string Result;
for (std::size_t Index = 0; Index < Count; ++Index) {
auto Operand = formatAnyOperand(Instruction, Index, Target, Printer);
if (!Operand)
return std::unexpected(Operand.error());
if (!Result.empty())
Result += ", ";
Result += *Operand;
}
return Result;
}
} // namespace
Expected<std::string> RISCVInstPrinter::printInstruction(const mc::MCInst &Instruction) const {
const AssemblyInstructionInfo *Assembly =
assemblyInstruction(Opcode::fromValue(Instruction.opcode().value()));
if (Assembly == nullptr || Assembly->Mnemonic.empty()) {
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V instruction has no generated assembly spelling");
}
const AssemblyFormatInfo *Format = assemblyFormat(Assembly->Format);
if (Format == nullptr) {
return makeUnexpected(ErrorCode::InternalError,
"RISC-V instruction references an unknown assembly format");
}
std::string Operands;
if (const auto LinearCount = linearOperandCount(Format->Name)) {
auto Joined = joinOperands(Instruction, *LinearCount, *Target, *this);
if (!Joined)
return std::unexpected(Joined.error());
Operands = std::move(*Joined);
} else if (Format->Name == "rd-offset-rs1" || Format->Name == "frd-offset-rs1" ||
Format->Name == "rs2-offset-rs1" || Format->Name == "frs2-offset-rs1") {
auto Count = requireOperandCount(Instruction, 3);
if (!Count)
return std::unexpected(Count.error());
auto First = formatRegisterOperand(Instruction, 0, *Target, *this);
if (!First)
return std::unexpected(First.error());
auto Address = formatAddress(Instruction, 2, 1, *Target, *this);
if (!Address)
return std::unexpected(Address.error());
Operands = *First + ", " + *Address;
} else if (Format->Name == "rd-paren-rs1") {
auto Count = requireOperandCount(Instruction, 2);
if (!Count)
return std::unexpected(Count.error());
auto Destination = formatRegisterOperand(Instruction, 0, *Target, *this);
if (!Destination)
return std::unexpected(Destination.error());
auto Base = formatRegisterOperand(Instruction, 1, *Target, *this);
if (!Base)
return std::unexpected(Base.error());
Operands = *Destination + ", (" + *Base + ")";
} else if (Format->Name == "rd-rs2-paren-rs1") {
auto Count = requireOperandCount(Instruction, 3);
if (!Count)
return std::unexpected(Count.error());
auto Destination = formatRegisterOperand(Instruction, 0, *Target, *this);
if (!Destination)
return std::unexpected(Destination.error());
auto Value = formatRegisterOperand(Instruction, 1, *Target, *this);
if (!Value)
return std::unexpected(Value.error());
auto Base = formatRegisterOperand(Instruction, 2, *Target, *this);
if (!Base)
return std::unexpected(Base.error());
Operands = *Destination + ", " + *Value + ", (" + *Base + ")";
} else if (Format->Name == "imm-sp") {
auto Count = requireOperandCount(Instruction, 1);
if (!Count)
return std::unexpected(Count.error());
auto Immediate = formatAnyOperand(Instruction, 0, *Target, *this);
if (!Immediate)
return std::unexpected(Immediate.error());
Operands = "sp, " + *Immediate;
} else if (Format->Name == "rd-imm-sp") {
auto Count = requireOperandCount(Instruction, 2);
if (!Count)
return std::unexpected(Count.error());
auto Destination = formatRegisterOperand(Instruction, 0, *Target, *this);
if (!Destination)
return std::unexpected(Destination.error());
auto Immediate = formatAnyOperand(Instruction, 1, *Target, *this);
if (!Immediate)
return std::unexpected(Immediate.error());
Operands = *Destination + ", sp, " + *Immediate;
} else if (Format->Name == "rd-offset-sp" || Format->Name == "frd-offset-sp" ||
Format->Name == "rs2-offset-sp" || Format->Name == "frs2-offset-sp") {
auto Count = requireOperandCount(Instruction, 2);
if (!Count)
return std::unexpected(Count.error());
auto First = formatRegisterOperand(Instruction, 0, *Target, *this);
if (!First)
return std::unexpected(First.error());
auto Offset = formatAnyOperand(Instruction, 1, *Target, *this);
if (!Offset)
return std::unexpected(Offset.error());
Operands = *First + ", " + *Offset + "(sp)";
} else {
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V assembly printer does not support generated format '" +
std::string(Format->Name) + "'");
}
std::string Result(Assembly->Mnemonic);
if (!Operands.empty())
Result += " " + Operands;
return Result;
}
Expected<std::string> RISCVInstPrinter::printTargetExpression(std::uint32_t Kind,
std::string_view Operand) const {
switch (static_cast<RISCVMCExprKind>(Kind)) {
case RISCVMCExprKind::CallPLT:
return std::string(Operand);
case RISCVMCExprKind::PCRelativeHigh:
return "%pcrel_hi(" + std::string(Operand) + ")";
case RISCVMCExprKind::PCRelativeLow:
return "%pcrel_lo(" + std::string(Operand) + ")";
case RISCVMCExprKind::AbsoluteHigh:
return "%hi(" + std::string(Operand) + ")";
case RISCVMCExprKind::AbsoluteLow:
return "%lo(" + std::string(Operand) + ")";
}
return makeUnexpected(ErrorCode::AssemblyLoweringFailed,
"RISC-V MC expression has an unknown target kind");
}
} // namespace rcc::riscv
|
