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authorRichard Qin <richard.qin.x@gmail.com>2026-05-02 23:34:21 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-05-02 23:34:21 +0800
commitb1b0b1aad65b57900e18539d6f25b38e51801822 (patch)
tree905062ec0dec32f9106e0e6a2da48b818c7924e0 /na/arch/riscv/lib
parent4e7a069f8c39c2f97cde675492d7c55491f10fa3 (diff)
downloadlume-b1b0b1aad65b57900e18539d6f25b38e51801822.tar.gz
lume-b1b0b1aad65b57900e18539d6f25b38e51801822.tar.xz
feat: implement hardware random number generation and early PRNG initialization
Diffstat (limited to 'na/arch/riscv/lib')
-rw-r--r--na/arch/riscv/lib/random.cc21
1 files changed, 21 insertions, 0 deletions
diff --git a/na/arch/riscv/lib/random.cc b/na/arch/riscv/lib/random.cc
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index 0000000..afc0078
--- /dev/null
+++ b/na/arch/riscv/lib/random.cc
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Copyright (C) 2026 Richard Qin */
+
+#include <arch/random.h>
+#include <lume/klog.h>
+
+namespace arch {
+
+bool get_hw_random(uint64& value)
+{
+ /*
+ * Real implementation would check for Zkr extension and execute:
+ * csrr x, seed
+ *
+ * Since QEMU virt doesn't guarantee Zkr, we return false to
+ * force the MI layer to use the timer fallback.
+ */
+ return false;
+}
+
+} // namespace arch