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* Remove old codeRichard Qin13 days95-8078/+0
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* lib: establish Zircon libc++ and KTL foundationRichard Qin2026-07-114-0/+661
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* refactor: promote new architecture to repository rootRichard Qin2026-07-10136-4635/+7417
| | | | Archive the deprecated implementation under lume-legacy, make the new kernel the default root-level build, and update repository entry points without changing kernel behavior.
* feat: add initial RISC-V architecture support and core kernel functionalityRichard Qin2026-04-172-8/+8
| | | | | | | | | | | | | | | | | - Implement MMU hardware primitives for RISC-V SV39 in mmu.h - Create trap vector control primitives in trap.h - Define trap frame structure for RISC-V in trapframe.h - Add assembly routines for context switching in swtch.S - Implement trap vector entry/exit in trap_vector.S - Introduce basic error number definitions in errno.h - Provide placement new/delete operators in new.h - Define kernel panic handler in panic.h and implement in panic.cc - Establish basic type definitions in types.h - Create the kernel main entry point in main.cc with global initialization - Add synchronization primitives using spinlocks in spinlock.h and spinlock.cc - Define per-CPU state tracking for interrupts in cpu_state.h - Create a linker script for the kernel in linker.ld - Update module makefiles for kernel and library components
* feat: implement FDT-based memory discovery and add comprehensive debug ↵Richard Qin2026-04-149-56/+504
| | | | logging to exec syscalls
* Important: License changed from MIT to GPL.Richard Qin2026-01-0541-0/+200
| | | | Rewrote the README based on the actual project.
* feat(file-system): implement read and write FAT32 File System and basic shellRichard Qin2026-01-0411-35/+116
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* Fix: critical malloc size calculation bugRichard Qin2026-01-032-1/+6
| | | | | | | | | | Summary: - Fixed an integer arithmetic error in malloc() where 'nunits' was initialized to 0, causing incorrect heap sizing. - This bug caused malloc to return pointers pointing to unmapped memory pages, leading to Store Page Fault (scause 15) at process boundaries. - Switched memory allocator logic to use byte-based size calculation instead of K&R style units to prevent off-by-one errors. Improvements: - Shell now starts successfully without segfaults.
* dev(sell): add simple libc and implement shellRichard Qin2026-01-0217-0/+2529
| | | | please see the log for detail.
* dev(file-system): establish VFS and Read-only FAT32 File SystemRichard Qin2026-01-0212-1/+361
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* dev(device): implement VirtIORichard Qin2026-01-016-3/+133
| | | | See dev log for detail
* dev: PILC implementationRichard Qin2025-12-311-0/+17
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* dev:Refactor Memory Management and Process ManagementRichard Qin2025-12-3112-90/+169
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* dev(spinlock): refactoring the implementation of locksRichard Qin2025-12-302-15/+61
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* dev(pmm.h): refactor header fileRichard Qin2025-12-301-4/+44
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* feat(types): defined a type aliasRichard Qin2025-12-301-15/+20
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* feat(user): add user-space build system and init process to test fork/waitRichard Qin2025-12-282-1/+32
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* feat(syscall): Implement syscall dispatch and process lifecycle ↵Richard Qin2025-12-284-2/+69
| | | | (exit/wait/sleep)
* feat: Implement the first user program of the lume OSRichard Qin2025-12-275-16/+33
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* feat: Encapsulates the low-level hardware details of the RISC-V ↵Richard Qin2025-12-251-0/+400
| | | | | | architecture, providing interfaces for the rest of the kernel to operate CPU registers and manage memory Copied from the xv-6 source code.
* feat: add preemptive scheduling, SBI timer support and FDT parser.Richard Qin2025-12-132-1/+10
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* feat:Cooperative MultitaskingRichard Qin2025-12-112-0/+62
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* feat: Add initial Supervisor Mode Trap HandlerRichard Qin2025-12-103-1/+55
| | | | | | | | | | Implement the initial mechanism for handling traps and exceptions in Supervisor Mode. Set up the stvec Control and Status Register (CSR) to direct all S-Mode Traps (Interrupts and Exceptions) to a unified assembly entry point. Implemented assembly code for saving and restoring the Trap Context (register state). Provides the foundational framework necessary for future Timer Interrupts and System Calls.
* feat: Initial PMM implementationRichard Qin2025-12-092-0/+34
| | | | | | Introduce the foundational Physical Memory Manager (PMM) and restructure the project for modularity. Implemented basic PMM and related memory management headers (mm/pmm.h, mm/vm.h). Updated Makefile and build process to support new modular structure.
* The start of the project -- A MicroDOSRichard Qin2025-12-082-0/+21
feat: Initial bare-metal RISC-V boot with UART
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 04:14:40 +0000