summaryrefslogtreecommitdiff
path: root/na/arch
Commit message (Collapse)AuthorAgeFilesLines
* refactor: promote new architecture to repository rootRichard Qin2026-07-1034-3681/+0
| | | | Archive the deprecated implementation under lume-legacy, make the new kernel the default root-level build, and update repository entry points without changing kernel behavior.
* feat: establish bootable new architecture checkpointRichard Qin2026-07-1028-903/+1524
| | | | Replace the compressed boot path with a relocatable higher-half RISC-V entry, expand memory and SMP support, and add the driver, TTY, VFS, exec, signal, syscall, initramfs, and self-test infrastructure needed for a bootable kernel checkpoint.
* feat: update module.mk files to include additional source files for various ↵Richard Qin2026-05-131-0/+5
| | | | subsystems
* feat: implement user-kernel memory copy functions with validationRichard Qin2026-05-131-0/+117
|
* feat: add syscall dispatch implementation for RISC-V architectureRichard Qin2026-05-131-0/+28
|
* feat: add ret_from_fork trampoline for newly forked processesRichard Qin2026-05-131-1/+18
|
* feat: add kernelvec for S-mode trap handling and improve trap_vector ↵Richard Qin2026-05-131-0/+104
| | | | functionality
* feat: add exception table implementation with binary search and initializationRichard Qin2026-05-132-0/+147
|
* feat: add RISC-V specific trap handling logic and dispatch functionsRichard Qin2026-05-131-0/+205
|
* feat: add support for Copy-On-Write in SV39 page table managementRichard Qin2026-05-132-6/+89
|
* feat: add LZ4 decompressor implementation and update linker scriptRichard Qin2026-05-131-0/+7
|
* feat: add compressed kernel header and implementation for RISC-V architectureRichard Qin2026-05-131-0/+471
|
* feat: add relocation header and implementation for RISC-V architectureRichard Qin2026-05-131-1/+46
|
* feat: add relocation header and implementation for RISC-V architectureRichard Qin2026-05-131-0/+100
|
* feat: refactor KASLR computation and enhance validation checksRichard Qin2026-05-131-62/+145
|
* feat: add LumeOS compressed kernel header and update boot entry logicRichard Qin2026-05-131-7/+38
|
* feat: enhance KASLR support with early seed metadata and validation checksRichard Qin2026-05-031-5/+129
| | | | Co-authored-by: Copilot <copilot@github.com>
* feat: implement KASLR support and runtime address mapping for RISC-V ↵Richard Qin2026-05-033-7/+104
| | | | | | architecture Co-authored-by: Copilot <copilot@github.com>
* feat: add Kconfig infrastructure for kernel configuration managementRichard Qin2026-05-031-0/+39
|
* feat: implement hardware random number generation and early PRNG initializationRichard Qin2026-05-022-0/+48
|
* feat: add RISC-V configuration and memory management enhancementsRichard Qin2026-05-026-15/+112
| | | | Co-authored-by: Copilot <copilot@github.com>
* feat: update UART handling and memory management parameters for improved ↵Richard Qin2026-05-021-4/+0
| | | | functionality
* feat: replace panic.h with klog.h for improved logging in multiple filesRichard Qin2026-05-021-1/+1
|
* feat: add SBI interface with ecall and timer functions for RISC-V architectureRichard Qin2026-05-021-0/+39
|
* feat: add timer interrupt enable/disable functions for RISC-V architectureRichard Qin2026-05-021-0/+15
|
* feat: add linker script and common macros for RISC-V architectureRichard Qin2026-04-221-0/+81
|
* feat: implement SV39 page table interface and operations for RISC-V architectureRichard Qin2026-04-212-0/+222
|
* feat: add RISC-V architecture configuration header with memory layout constantsRichard Qin2026-04-212-6/+41
|
* feat: Update Makefile and module.mk files to include additional source files ↵Richard Qin2026-04-211-0/+1
| | | | and improve build process
* feat: add initial RISC-V architecture support and core kernel functionalityRichard Qin2026-04-179-0/+823
- Implement MMU hardware primitives for RISC-V SV39 in mmu.h - Create trap vector control primitives in trap.h - Define trap frame structure for RISC-V in trapframe.h - Add assembly routines for context switching in swtch.S - Implement trap vector entry/exit in trap_vector.S - Introduce basic error number definitions in errno.h - Provide placement new/delete operators in new.h - Define kernel panic handler in panic.h and implement in panic.cc - Establish basic type definitions in types.h - Create the kernel main entry point in main.cc with global initialization - Add synchronization primitives using spinlocks in spinlock.h and spinlock.cc - Define per-CPU state tracking for interrupts in cpu_state.h - Create a linker script for the kernel in linker.ld - Update module makefiles for kernel and library components