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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-13 19:04:49 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-13 19:04:49 +0800
commit1ef9d699d3160a9f79e89f423352fbb8d43e70d7 (patch)
tree4f09997dbf17124c1ea5572b01f7061b1493c0c8 /backend/include/rcc/CodeGen/MachineRegisterInfo.h
parent1ecaa5028a39cdfd9b9590053d802e8049d346d5 (diff)
downloadrcc-project-1ef9d699d3160a9f79e89f423352fbb8d43e70d7.tar.gz
rcc-project-1ef9d699d3160a9f79e89f423352fbb8d43e70d7.tar.xz
[RISCV] Match LLVM register bank mappings
Diffstat (limited to 'backend/include/rcc/CodeGen/MachineRegisterInfo.h')
-rw-r--r--backend/include/rcc/CodeGen/MachineRegisterInfo.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/backend/include/rcc/CodeGen/MachineRegisterInfo.h b/backend/include/rcc/CodeGen/MachineRegisterInfo.h
index cc9026e..524ee77 100644
--- a/backend/include/rcc/CodeGen/MachineRegisterInfo.h
+++ b/backend/include/rcc/CodeGen/MachineRegisterInfo.h
@@ -145,6 +145,7 @@ public:
}
[[nodiscard]] RegOperandRange regOperands(Register Reg) noexcept;
+ [[nodiscard]] RegOperandRange regOperands(Register Reg) const noexcept;
[[nodiscard]] RegOperandRange regNoDebugOperands(Register Reg) noexcept;
[[nodiscard]] RegOperandRange useOperands(Register Reg, bool IncludeDebug = true) noexcept;
[[nodiscard]] RegOperandRange defOperands(Register Reg) noexcept;