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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-01 16:07:24 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-01 16:07:24 +0800 |
| commit | 924dcd36ebed84f04729de05ec08b311a36a04c1 (patch) | |
| tree | 300af742968d4d48915ef178855741f7087fc979 /backend/lib/CodeGen/InstructionDescriptor.cpp | |
| parent | cfdbcc469f9691bd9dce3b0b86982a63d86ca6b7 (diff) | |
| download | rcc-project-924dcd36ebed84f04729de05ec08b311a36a04c1.tar.gz rcc-project-924dcd36ebed84f04729de05ec08b311a36a04c1.tar.xz | |
[CodeGen] Add target register descriptions
Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage.
Diffstat (limited to 'backend/lib/CodeGen/InstructionDescriptor.cpp')
| -rw-r--r-- | backend/lib/CodeGen/InstructionDescriptor.cpp | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/backend/lib/CodeGen/InstructionDescriptor.cpp b/backend/lib/CodeGen/InstructionDescriptor.cpp index 9f4a178..3d97440 100644 --- a/backend/lib/CodeGen/InstructionDescriptor.cpp +++ b/backend/lib/CodeGen/InstructionDescriptor.cpp @@ -493,14 +493,6 @@ Expected<void> InstructionSet::validateOperand(const OperandDescriptor &Descript auto Info = RegInfo.virtualRegisterInfo(*Reg); if (!Info) return std::unexpected(Info.error()); - if (Descriptor.RegBank && Info->get().Bank != Descriptor.RegBank) { - return makeUnexpected(ErrorCode::VerificationError, - "virtual register bank does not match operand descriptor"); - } - if (Descriptor.RegClass && Info->get().RegClass != Descriptor.RegClass) { - return makeUnexpected(ErrorCode::VerificationError, - "virtual register class does not match operand descriptor"); - } } } |
