aboutsummaryrefslogtreecommitdiff
path: root/backend/lib/CodeGen/MachineVerifier.cpp
diff options
context:
space:
mode:
authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-15 23:33:09 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-15 23:33:09 +0800
commit1fe32a79cee5cae6dea6fbb1d9f15f7db817a356 (patch)
tree860ec6e0f92fbaf5fb26188daf2d885c84a028b6 /backend/lib/CodeGen/MachineVerifier.cpp
parent03859a465585d5e9dd256c7a0a2855219dc79ed3 (diff)
downloadrcc-project-1fe32a79cee5cae6dea6fbb1d9f15f7db817a356.tar.gz
rcc-project-1fe32a79cee5cae6dea6fbb1d9f15f7db817a356.tar.xz
[GlobalISel] Clear virtual register types after selection
Diffstat (limited to 'backend/lib/CodeGen/MachineVerifier.cpp')
-rw-r--r--backend/lib/CodeGen/MachineVerifier.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/backend/lib/CodeGen/MachineVerifier.cpp b/backend/lib/CodeGen/MachineVerifier.cpp
index 68a28db..5a040b9 100644
--- a/backend/lib/CodeGen/MachineVerifier.cpp
+++ b/backend/lib/CodeGen/MachineVerifier.cpp
@@ -923,8 +923,9 @@ private:
}
const bool NeedsTypes = Options.Mode == MachineVerifierMode::PreLegalizer ||
- Has(MachineFunctionProperty::Legalized) ||
- Has(MachineFunctionProperty::RegBankSelected);
+ (!Has(MachineFunctionProperty::Selected) &&
+ (Has(MachineFunctionProperty::Legalized) ||
+ Has(MachineFunctionProperty::RegBankSelected)));
if (NeedsTypes && MissingVirtualType)
return fail("typed pipeline stage has a virtual register without LowLevelType");