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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 19:04:49 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 19:04:49 +0800 |
| commit | 1ef9d699d3160a9f79e89f423352fbb8d43e70d7 (patch) | |
| tree | 4f09997dbf17124c1ea5572b01f7061b1493c0c8 /backend/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h | |
| parent | 1ecaa5028a39cdfd9b9590053d802e8049d346d5 (diff) | |
| download | rcc-project-1ef9d699d3160a9f79e89f423352fbb8d43e70d7.tar.gz rcc-project-1ef9d699d3160a9f79e89f423352fbb8d43e70d7.tar.xz | |
[RISCV] Match LLVM register bank mappings
Diffstat (limited to 'backend/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h')
| -rw-r--r-- | backend/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/backend/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h b/backend/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h index 543bc4d..69eb539 100644 --- a/backend/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h +++ b/backend/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.h @@ -9,13 +9,15 @@ namespace rcc::riscv { class RISCVRegisterBankInfo final : public RegisterBankInfo { public: - [[nodiscard]] Expected<RegisterBankID> selectBank(const MachineFunction &Function, Register Reg, - const VirtualRegisterInfo &Info, - const MachineInstr *Instruction, - const TargetDescription &Target) const override; - [[nodiscard]] Expected<void> constrainInstruction(MachineInstr &Instruction, - MachineFunction &Function, - const TargetDescription &Target) const override; + [[nodiscard]] Expected<RegisterBankSelection> + selectBank(const MachineFunction &Function, Register Reg, const VirtualRegisterInfo &Info, + const MachineInstr *Instruction, const TargetDescription &Target) const override; + [[nodiscard]] Expected<RegisterBankInstructionMapping> + getInstructionMapping(const MachineInstr &Instruction, const MachineFunction &Function, + const TargetDescription &Target) const override; + [[nodiscard]] Expected<void> constrainSelectedInstruction(MachineInstr &Instruction, + MachineFunction &Function, + const TargetDescription &Target) const; [[nodiscard]] Expected<void> constrainRegister(MachineFunction &Function, Register Reg, const TargetDescription &Target) const; [[nodiscard]] Expected<void> validateInstruction(const MachineInstr &Instruction, |