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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-19 03:41:05 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-19 03:41:05 +0800 |
| commit | 219b315373ef34ca20cc78b89bf3c3d19442ffbd (patch) | |
| tree | e65feacb93b93fee1d591486b97573ce7b78b85e /backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc | |
| parent | 3cc064e41f6913b176fbfb2d6e65d049f611b1d4 (diff) | |
| download | rcc-project-219b315373ef34ca20cc78b89bf3c3d19442ffbd.tar.gz rcc-project-219b315373ef34ca20cc78b89bf3c3d19442ffbd.tar.xz | |
[RISCV][GlobalISel] Generate integer load selection
Diffstat (limited to 'backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc')
| -rw-r--r-- | backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc | 190 |
1 files changed, 190 insertions, 0 deletions
diff --git a/backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc b/backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc index f69ab81..1ff9593 100644 --- a/backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc +++ b/backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc @@ -2,6 +2,196 @@ selection_rules: - + id: select_g_load_m8 + priority: 300 + match: + opcode: G_LOAD + memory: { index: 0, bytes: 1 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LBU + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_load_m16 + priority: 300 + match: + opcode: G_LOAD + memory: { index: 0, bytes: 2 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LH + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_load_m32 + priority: 300 + match: + opcode: G_LOAD + memory: { index: 0, bytes: 4 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LW + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_load_m64 + priority: 300 + match: + opcode: G_LOAD + memory: { index: 0, bytes: 8 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LD + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_sextload_m8 + priority: 300 + match: + opcode: G_SEXTLOAD + memory: { index: 0, bytes: 1 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LB + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_sextload_m16 + priority: 300 + match: + opcode: G_SEXTLOAD + memory: { index: 0, bytes: 2 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LH + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_sextload_m32 + priority: 300 + match: + opcode: G_SEXTLOAD + memory: { index: 0, bytes: 4 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LW + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_zextload_m8 + priority: 300 + match: + opcode: G_ZEXTLOAD + memory: { index: 0, bytes: 1 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LBU + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_zextload_m16 + priority: 300 + match: + opcode: G_ZEXTLOAD + memory: { index: 0, bytes: 2 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LHU + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - + id: select_g_zextload_m32 + priority: 300 + match: + opcode: G_ZEXTLOAD + memory: { index: 0, bytes: 4 } + operand_types: + - { index: 1, kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + - { index: 1, bank: GPR } + apply: + instructions: + - opcode: LWU + root: true + operands: + - { operand: 0 } + - { complex: addr_reg_imm_base, operand: 1 } + - { complex: addr_reg_imm_offset, operand: 1 } + - id: select_g_frame_index priority: 100 match: |