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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-19 02:50:30 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-19 02:50:30 +0800
commit6c97d54954112be9a5badacaec8efa1d05bd7d15 (patch)
tree9eb4d5db7f05218759e6f6d49cf90ca65f1e53f8 /backend/utils/TableGen/Common/CodeGenTarget.h
parentf5c592905e6e1ef4b78337d76c8215e543607b8d (diff)
downloadrcc-project-6c97d54954112be9a5badacaec8efa1d05bd7d15.tar.gz
rcc-project-6c97d54954112be9a5badacaec8efa1d05bd7d15.tar.xz
[RISCV][GlobalISel] Generate indirect branch selection
Diffstat (limited to 'backend/utils/TableGen/Common/CodeGenTarget.h')
-rw-r--r--backend/utils/TableGen/Common/CodeGenTarget.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/backend/utils/TableGen/Common/CodeGenTarget.h b/backend/utils/TableGen/Common/CodeGenTarget.h
index 97e1447..9a7c0a2 100644
--- a/backend/utils/TableGen/Common/CodeGenTarget.h
+++ b/backend/utils/TableGen/Common/CodeGenTarget.h
@@ -53,6 +53,7 @@ struct NormalizedRegisterClass final {
std::uint64_t Lanes = 0;
std::vector<std::uint32_t> Registers;
std::vector<std::uint32_t> AllocationOrder;
+ std::vector<std::uint32_t> SuperClasses;
bool Allocatable = true;
std::uint32_t CopyCost = 1;
};