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| author | Richard Qin <richard.qin.x@gmail.com> | 2026-03-17 16:51:29 +0000 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-03-17 16:51:29 +0000 |
| commit | abddef6c366a4a8e8f878158cf1bac14f9ad59b2 (patch) | |
| tree | 61c0bef5b807090d4fc619ae1f744b034ff4b866 /rv64cpu/rtl/core/decoder.sv | |
| parent | cd638dacbe7d0f890206209317cc119246cf700b (diff) | |
| download | rcc-project-abddef6c366a4a8e8f878158cf1bac14f9ad59b2.tar.gz rcc-project-abddef6c366a4a8e8f878158cf1bac14f9ad59b2.tar.xz | |
docs: Finalized Richard CPU RTL architectural and naming convention audit report.
No source code changes were made; this branch serves as the finalized state for the provided audit.
Co-authored-by: Richard-Qin-001 <69390919+Richard-Qin-001@users.noreply.github.com>
Diffstat (limited to 'rv64cpu/rtl/core/decoder.sv')
| -rw-r--r-- | rv64cpu/rtl/core/decoder.sv | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/rv64cpu/rtl/core/decoder.sv b/rv64cpu/rtl/core/decoder.sv index 585a018..c948646 100644 --- a/rv64cpu/rtl/core/decoder.sv +++ b/rv64cpu/rtl/core/decoder.sv @@ -80,7 +80,7 @@ module decoder assign opcode = instr[6:0]; assign rd_addr = instr[11:7]; assign funct3 = instr[14:12]; - assign rs1_addr = instr[19:15]; + assign rs1_addr = (opcode == OPCODE_LUI) ? 5'b00000 : instr[19:15]; assign rs2_addr = instr[24:20]; assign funct7 = instr[31:25]; |