aboutsummaryrefslogtreecommitdiff
path: root/rv64cpu/rtl/core/registers
diff options
context:
space:
mode:
authorRichard Qin <richard.qin.x@gmail.com>2026-11-07 03:16:17 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-11-07 03:16:17 +0800
commite0948e3fc10029ba4bb4d48d7b5daae94fe575b9 (patch)
tree99c5427ff631b03fcad311288604e7dd02ee3557 /rv64cpu/rtl/core/registers
parent6f57dd79572c177b775a934bee54ceb85a55c28a (diff)
downloadrcc-project-e0948e3fc10029ba4bb4d48d7b5daae94fe575b9.tar.gz
rcc-project-e0948e3fc10029ba4bb4d48d7b5daae94fe575b9.tar.xz
refactor: align RTL module names with files
Diffstat (limited to 'rv64cpu/rtl/core/registers')
-rw-r--r--rv64cpu/rtl/core/registers/fpr_file.sv2
-rw-r--r--rv64cpu/rtl/core/registers/gpr_file.sv2
2 files changed, 2 insertions, 2 deletions
diff --git a/rv64cpu/rtl/core/registers/fpr_file.sv b/rv64cpu/rtl/core/registers/fpr_file.sv
index 67e83f9..7522b5f 100644
--- a/rv64cpu/rtl/core/registers/fpr_file.sv
+++ b/rv64cpu/rtl/core/registers/fpr_file.sv
@@ -4,7 +4,7 @@
// File path: rtl/core/fp_regfile.sv
// Description: 32-entry 64-bit floating-point register file for RV64F/RV64D.
-module fp_regfile
+module fpr_file
import rv64_pkg::*;
(
input logic clk,
diff --git a/rv64cpu/rtl/core/registers/gpr_file.sv b/rv64cpu/rtl/core/registers/gpr_file.sv
index dbc3c04..4ddf200 100644
--- a/rv64cpu/rtl/core/registers/gpr_file.sv
+++ b/rv64cpu/rtl/core/registers/gpr_file.sv
@@ -17,7 +17,7 @@
// File path: rtl/core/regfile.sv
// Description: 64-bit Register File
-module regfile
+module gpr_file
import rv64_pkg::*;
(
input logic clk, // Clock signal